From a593866af60502a4ee7414881eca028badfe40ea Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 15 May 2020 23:41:33 -0400 Subject: [PATCH] target/arm: Move 'env' argument of recps_f32 and rsqrts_f32 helpers to usual place The usual location for the env argument in the argument list of a TCG helper is immediately after the return-value argument. recps_f32 and rsqrts_f32 differ in that they put it at the end. Move the env argument to its usual place; this will allow us to more easily use these helper functions with the gvec APIs. Backports commit 26c6f695cfd2a3ccddb4d015a25b56f56aa62928 from qemu --- qemu/target/arm/helper.h | 4 ++-- qemu/target/arm/translate.c | 4 ++-- qemu/target/arm/vfp_helper.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/qemu/target/arm/helper.h b/qemu/target/arm/helper.h index 15c02ef2..d9105f70 100644 --- a/qemu/target/arm/helper.h +++ b/qemu/target/arm/helper.h @@ -199,8 +199,8 @@ DEF_HELPER_FLAGS_3(vfp_fcvt_f64_to_f16, TCG_CALL_NO_RWG, f16, f64, ptr, i32) DEF_HELPER_4(vfp_muladdd, f64, f64, f64, f64, ptr) DEF_HELPER_4(vfp_muladds, f32, f32, f32, f32, ptr) -DEF_HELPER_3(recps_f32, f32, f32, f32, env) -DEF_HELPER_3(rsqrts_f32, f32, f32, f32, env) +DEF_HELPER_3(recps_f32, f32, env, f32, f32) +DEF_HELPER_3(rsqrts_f32, f32, env, f32, f32) DEF_HELPER_FLAGS_2(recpe_f16, TCG_CALL_NO_RWG, f16, f16, ptr) DEF_HELPER_FLAGS_2(recpe_f32, TCG_CALL_NO_RWG, f32, f32, ptr) DEF_HELPER_FLAGS_2(recpe_f64, TCG_CALL_NO_RWG, f64, f64, ptr) diff --git a/qemu/target/arm/translate.c b/qemu/target/arm/translate.c index 8a56f2b9..69cf1168 100644 --- a/qemu/target/arm/translate.c +++ b/qemu/target/arm/translate.c @@ -5620,9 +5620,9 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tcg_temp_free_ptr(tcg_ctx, fpstatus); } else { if (size == 0) { - gen_helper_recps_f32(tcg_ctx, tmp, tmp, tmp2, tcg_ctx->cpu_env); + gen_helper_recps_f32(tcg_ctx, tmp, tcg_ctx->cpu_env, tmp, tmp2); } else { - gen_helper_rsqrts_f32(tcg_ctx, tmp, tmp, tmp2, tcg_ctx->cpu_env); + gen_helper_rsqrts_f32(tcg_ctx, tmp, tcg_ctx->cpu_env, tmp, tmp2); } } break; diff --git a/qemu/target/arm/vfp_helper.c b/qemu/target/arm/vfp_helper.c index d9123cc3..b1da5f6a 100644 --- a/qemu/target/arm/vfp_helper.c +++ b/qemu/target/arm/vfp_helper.c @@ -590,7 +590,7 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *fpstp, uint32_t ahp_mode) #define float32_three make_float32(0x40400000) #define float32_one_point_five make_float32(0x3fc00000) -float32 HELPER(recps_f32)(float32 a, float32 b, CPUARMState *env) +float32 HELPER(recps_f32)(CPUARMState *env, float32 a, float32 b) { float_status *s = &env->vfp.standard_fp_status; if ((float32_is_infinity(a) && float32_is_zero_or_denormal(b)) || @@ -603,7 +603,7 @@ float32 HELPER(recps_f32)(float32 a, float32 b, CPUARMState *env) return float32_sub(float32_two, float32_mul(a, b, s), s); } -float32 HELPER(rsqrts_f32)(float32 a, float32 b, CPUARMState *env) +float32 HELPER(rsqrts_f32)(CPUARMState *env, float32 a, float32 b) { float_status *s = &env->vfp.standard_fp_status; float32 product;