From ac4d051b05e61bd8704842764f0bbff104469e08 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 6 Mar 2018 14:54:25 -0500 Subject: [PATCH] tcg: Add generic vector helpers with a scalar operand Use dup to convert a non-constant scalar to a third vector. Add addition, multiplication, and logical operations with an immediate. Add addition, subtraction, multiplication, and logical operations with a non-constant scalar. Allow for the front-end to build operations in which the scalar operand comes first. Backports commit 22fc3527034678489ec554e82fd52f8a7f05418e from qemu --- qemu/aarch64.h | 40 +++++ qemu/aarch64eb.h | 40 +++++ qemu/arm.h | 40 +++++ qemu/armeb.h | 40 +++++ qemu/header_gen.py | 40 +++++ qemu/m68k.h | 40 +++++ qemu/mips.h | 40 +++++ qemu/mips64.h | 40 +++++ qemu/mips64el.h | 40 +++++ qemu/mipsel.h | 40 +++++ qemu/powerpc.h | 40 +++++ qemu/sparc.h | 40 +++++ qemu/sparc64.h | 40 +++++ qemu/tcg-runtime-gvec.c | 180 ++++++++++++++++++++ qemu/tcg/tcg-op-gvec.c | 360 +++++++++++++++++++++++++++++++++++++++- qemu/tcg/tcg-op-gvec.h | 109 +++++++++--- qemu/tcg/tcg-runtime.h | 19 +++ qemu/x86_64.h | 40 +++++ 18 files changed, 1201 insertions(+), 27 deletions(-) diff --git a/qemu/aarch64.h b/qemu/aarch64.h index b8ad7039..4770c10d 100644 --- a/qemu/aarch64.h +++ b/qemu/aarch64.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_aarch64 #define helper_gvec_add32 helper_gvec_add32_aarch64 #define helper_gvec_add64 helper_gvec_add64_aarch64 +#define helper_gvec_adds8 helper_gvec_adds8_aarch64 +#define helper_gvec_adds16 helper_gvec_adds16_aarch64 +#define helper_gvec_adds32 helper_gvec_adds32_aarch64 +#define helper_gvec_adds64 helper_gvec_adds64_aarch64 #define helper_gvec_and helper_gvec_and_aarch64 #define helper_gvec_andc helper_gvec_andc_aarch64 +#define helper_gvec_ands helper_gvec_ands_aarch64 #define helper_gvec_dup8 helper_gvec_dup8_aarch64 #define helper_gvec_dup16 helper_gvec_dup16_aarch64 #define helper_gvec_dup32 helper_gvec_dup32_aarch64 @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_aarch64 #define helper_gvec_mul32 helper_gvec_mul32_aarch64 #define helper_gvec_mul64 helper_gvec_mul64_aarch64 +#define helper_gvec_muls8 helper_gvec_muls8_aarch64 +#define helper_gvec_muls16 helper_gvec_muls16_aarch64 +#define helper_gvec_muls32 helper_gvec_muls32_aarch64 +#define helper_gvec_muls64 helper_gvec_muls64_aarch64 #define helper_gvec_ne8 helper_gvec_ne8_aarch64 #define helper_gvec_ne16 helper_gvec_ne16_aarch64 #define helper_gvec_ne32 helper_gvec_ne32_aarch64 @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_aarch64 #define helper_gvec_or helper_gvec_or_aarch64 #define helper_gvec_orc helper_gvec_orc_aarch64 +#define helper_gvec_ors helper_gvec_ors_aarch64 #define helper_gvec_sar8i helper_gvec_sar8i_aarch64 #define helper_gvec_sar16i helper_gvec_sar16i_aarch64 #define helper_gvec_sar32i helper_gvec_sar32i_aarch64 @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_aarch64 #define helper_gvec_sub32 helper_gvec_sub32_aarch64 #define helper_gvec_sub64 helper_gvec_sub64_aarch64 +#define helper_gvec_subs8 helper_gvec_subs8_aarch64 +#define helper_gvec_subs16 helper_gvec_subs16_aarch64 +#define helper_gvec_subs32 helper_gvec_subs32_aarch64 +#define helper_gvec_subs64 helper_gvec_subs64_aarch64 #define helper_gvec_ssadd8 helper_gvec_ssadd8_aarch64 #define helper_gvec_ssadd16 helper_gvec_ssadd16_aarch64 #define helper_gvec_ssadd32 helper_gvec_ssadd32_aarch64 @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_aarch64 #define helper_gvec_ussub64 helper_gvec_ussub64_aarch64 #define helper_gvec_xor helper_gvec_xor_aarch64 +#define helper_gvec_xors helper_gvec_xors_aarch64 #define helper_iwmmxt_addcb helper_iwmmxt_addcb_aarch64 #define helper_iwmmxt_addcl helper_iwmmxt_addcl_aarch64 #define helper_iwmmxt_addcw helper_iwmmxt_addcw_aarch64 @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_aarch64 #define tcg_gen_gvec_2 tcg_gen_gvec_2_aarch64 #define tcg_gen_gvec_2i tcg_gen_gvec_2i_aarch64 +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_aarch64 +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_aarch64 #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_aarch64 #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_aarch64 #define tcg_gen_gvec_3 tcg_gen_gvec_3_aarch64 @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_aarch64 #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_aarch64 #define tcg_gen_gvec_add tcg_gen_gvec_add_aarch64 +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_aarch64 +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_aarch64 +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_aarch64 +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_aarch64 +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_aarch64 +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_aarch64 #define tcg_gen_gvec_and tcg_gen_gvec_and_aarch64 #define tcg_gen_gvec_andc tcg_gen_gvec_andc_aarch64 +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_aarch64 +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_aarch64 #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_aarch64 #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_aarch64 #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_aarch64 @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_aarch64 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_aarch64 #define tcg_gen_gvec_mul tcg_gen_gvec_mul_aarch64 +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_aarch64 +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_aarch64 +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_aarch64 +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_aarch64 +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_aarch64 +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_aarch64 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_aarch64 #define tcg_gen_gvec_not tcg_gen_gvec_not_aarch64 #define tcg_gen_gvec_or tcg_gen_gvec_or_aarch64 #define tcg_gen_gvec_orc tcg_gen_gvec_orc_aarch64 +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_aarch64 +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_aarch64 #define tcg_gen_gvec_sari tcg_gen_gvec_sari_aarch64 #define tcg_gen_gvec_shli tcg_gen_gvec_shli_aarch64 #define tcg_gen_gvec_shri tcg_gen_gvec_shri_aarch64 #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_aarch64 #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_aarch64 #define tcg_gen_gvec_sub tcg_gen_gvec_sub_aarch64 +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_aarch64 +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_aarch64 +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_aarch64 +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_aarch64 +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_aarch64 #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_aarch64 #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_aarch64 #define tcg_gen_gvec_xor tcg_gen_gvec_xor_aarch64 +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_aarch64 +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_aarch64 #define tcg_gen_insn_start tcg_gen_insn_start_aarch64 #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_aarch64 #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_aarch64 diff --git a/qemu/aarch64eb.h b/qemu/aarch64eb.h index 1ee3a477..ca1a720e 100644 --- a/qemu/aarch64eb.h +++ b/qemu/aarch64eb.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_aarch64eb #define helper_gvec_add32 helper_gvec_add32_aarch64eb #define helper_gvec_add64 helper_gvec_add64_aarch64eb +#define helper_gvec_adds8 helper_gvec_adds8_aarch64eb +#define helper_gvec_adds16 helper_gvec_adds16_aarch64eb +#define helper_gvec_adds32 helper_gvec_adds32_aarch64eb +#define helper_gvec_adds64 helper_gvec_adds64_aarch64eb #define helper_gvec_and helper_gvec_and_aarch64eb #define helper_gvec_andc helper_gvec_andc_aarch64eb +#define helper_gvec_ands helper_gvec_ands_aarch64eb #define helper_gvec_dup8 helper_gvec_dup8_aarch64eb #define helper_gvec_dup16 helper_gvec_dup16_aarch64eb #define helper_gvec_dup32 helper_gvec_dup32_aarch64eb @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_aarch64eb #define helper_gvec_mul32 helper_gvec_mul32_aarch64eb #define helper_gvec_mul64 helper_gvec_mul64_aarch64eb +#define helper_gvec_muls8 helper_gvec_muls8_aarch64eb +#define helper_gvec_muls16 helper_gvec_muls16_aarch64eb +#define helper_gvec_muls32 helper_gvec_muls32_aarch64eb +#define helper_gvec_muls64 helper_gvec_muls64_aarch64eb #define helper_gvec_ne8 helper_gvec_ne8_aarch64eb #define helper_gvec_ne16 helper_gvec_ne16_aarch64eb #define helper_gvec_ne32 helper_gvec_ne32_aarch64eb @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_aarch64eb #define helper_gvec_or helper_gvec_or_aarch64eb #define helper_gvec_orc helper_gvec_orc_aarch64eb +#define helper_gvec_ors helper_gvec_ors_aarch64eb #define helper_gvec_sar8i helper_gvec_sar8i_aarch64eb #define helper_gvec_sar16i helper_gvec_sar16i_aarch64eb #define helper_gvec_sar32i helper_gvec_sar32i_aarch64eb @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_aarch64eb #define helper_gvec_sub32 helper_gvec_sub32_aarch64eb #define helper_gvec_sub64 helper_gvec_sub64_aarch64eb +#define helper_gvec_subs8 helper_gvec_subs8_aarch64eb +#define helper_gvec_subs16 helper_gvec_subs16_aarch64eb +#define helper_gvec_subs32 helper_gvec_subs32_aarch64eb +#define helper_gvec_subs64 helper_gvec_subs64_aarch64eb #define helper_gvec_ssadd8 helper_gvec_ssadd8_aarch64eb #define helper_gvec_ssadd16 helper_gvec_ssadd16_aarch64eb #define helper_gvec_ssadd32 helper_gvec_ssadd32_aarch64eb @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_aarch64eb #define helper_gvec_ussub64 helper_gvec_ussub64_aarch64eb #define helper_gvec_xor helper_gvec_xor_aarch64eb +#define helper_gvec_xors helper_gvec_xors_aarch64eb #define helper_iwmmxt_addcb helper_iwmmxt_addcb_aarch64eb #define helper_iwmmxt_addcl helper_iwmmxt_addcl_aarch64eb #define helper_iwmmxt_addcw helper_iwmmxt_addcw_aarch64eb @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_aarch64eb #define tcg_gen_gvec_2 tcg_gen_gvec_2_aarch64eb #define tcg_gen_gvec_2i tcg_gen_gvec_2i_aarch64eb +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_aarch64eb +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_aarch64eb #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_aarch64eb #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_aarch64eb #define tcg_gen_gvec_3 tcg_gen_gvec_3_aarch64eb @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_aarch64eb #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_aarch64eb #define tcg_gen_gvec_add tcg_gen_gvec_add_aarch64eb +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_aarch64eb +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_aarch64eb +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_aarch64eb +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_aarch64eb +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_aarch64eb +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_aarch64eb #define tcg_gen_gvec_and tcg_gen_gvec_and_aarch64eb #define tcg_gen_gvec_andc tcg_gen_gvec_andc_aarch64eb +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_aarch64eb +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_aarch64eb #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_aarch64eb #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_aarch64eb #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_aarch64eb @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_aarch64eb #define tcg_gen_gvec_mov tcg_gen_gvec_mov_aarch64eb #define tcg_gen_gvec_mul tcg_gen_gvec_mul_aarch64eb +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_aarch64eb +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_aarch64eb +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_aarch64eb +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_aarch64eb +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_aarch64eb +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_aarch64eb #define tcg_gen_gvec_neg tcg_gen_gvec_neg_aarch64eb #define tcg_gen_gvec_not tcg_gen_gvec_not_aarch64eb #define tcg_gen_gvec_or tcg_gen_gvec_or_aarch64eb #define tcg_gen_gvec_orc tcg_gen_gvec_orc_aarch64eb +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_aarch64eb +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_aarch64eb #define tcg_gen_gvec_sari tcg_gen_gvec_sari_aarch64eb #define tcg_gen_gvec_shli tcg_gen_gvec_shli_aarch64eb #define tcg_gen_gvec_shri tcg_gen_gvec_shri_aarch64eb #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_aarch64eb #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_aarch64eb #define tcg_gen_gvec_sub tcg_gen_gvec_sub_aarch64eb +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_aarch64eb +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_aarch64eb +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_aarch64eb +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_aarch64eb +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_aarch64eb #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_aarch64eb #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_aarch64eb #define tcg_gen_gvec_xor tcg_gen_gvec_xor_aarch64eb +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_aarch64eb +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_aarch64eb #define tcg_gen_insn_start tcg_gen_insn_start_aarch64eb #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_aarch64eb #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_aarch64eb diff --git a/qemu/arm.h b/qemu/arm.h index 12acbf1a..d0556c8d 100644 --- a/qemu/arm.h +++ b/qemu/arm.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_arm #define helper_gvec_add32 helper_gvec_add32_arm #define helper_gvec_add64 helper_gvec_add64_arm +#define helper_gvec_adds8 helper_gvec_adds8_arm +#define helper_gvec_adds16 helper_gvec_adds16_arm +#define helper_gvec_adds32 helper_gvec_adds32_arm +#define helper_gvec_adds64 helper_gvec_adds64_arm #define helper_gvec_and helper_gvec_and_arm #define helper_gvec_andc helper_gvec_andc_arm +#define helper_gvec_ands helper_gvec_ands_arm #define helper_gvec_dup8 helper_gvec_dup8_arm #define helper_gvec_dup16 helper_gvec_dup16_arm #define helper_gvec_dup32 helper_gvec_dup32_arm @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_arm #define helper_gvec_mul32 helper_gvec_mul32_arm #define helper_gvec_mul64 helper_gvec_mul64_arm +#define helper_gvec_muls8 helper_gvec_muls8_arm +#define helper_gvec_muls16 helper_gvec_muls16_arm +#define helper_gvec_muls32 helper_gvec_muls32_arm +#define helper_gvec_muls64 helper_gvec_muls64_arm #define helper_gvec_ne8 helper_gvec_ne8_arm #define helper_gvec_ne16 helper_gvec_ne16_arm #define helper_gvec_ne32 helper_gvec_ne32_arm @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_arm #define helper_gvec_or helper_gvec_or_arm #define helper_gvec_orc helper_gvec_orc_arm +#define helper_gvec_ors helper_gvec_ors_arm #define helper_gvec_sar8i helper_gvec_sar8i_arm #define helper_gvec_sar16i helper_gvec_sar16i_arm #define helper_gvec_sar32i helper_gvec_sar32i_arm @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_arm #define helper_gvec_sub32 helper_gvec_sub32_arm #define helper_gvec_sub64 helper_gvec_sub64_arm +#define helper_gvec_subs8 helper_gvec_subs8_arm +#define helper_gvec_subs16 helper_gvec_subs16_arm +#define helper_gvec_subs32 helper_gvec_subs32_arm +#define helper_gvec_subs64 helper_gvec_subs64_arm #define helper_gvec_ssadd8 helper_gvec_ssadd8_arm #define helper_gvec_ssadd16 helper_gvec_ssadd16_arm #define helper_gvec_ssadd32 helper_gvec_ssadd32_arm @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_arm #define helper_gvec_ussub64 helper_gvec_ussub64_arm #define helper_gvec_xor helper_gvec_xor_arm +#define helper_gvec_xors helper_gvec_xors_arm #define helper_iwmmxt_addcb helper_iwmmxt_addcb_arm #define helper_iwmmxt_addcl helper_iwmmxt_addcl_arm #define helper_iwmmxt_addcw helper_iwmmxt_addcw_arm @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_arm #define tcg_gen_gvec_2 tcg_gen_gvec_2_arm #define tcg_gen_gvec_2i tcg_gen_gvec_2i_arm +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_arm +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_arm #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_arm #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_arm #define tcg_gen_gvec_3 tcg_gen_gvec_3_arm @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_arm #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_arm #define tcg_gen_gvec_add tcg_gen_gvec_add_arm +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_arm +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_arm +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_arm +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_arm +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_arm +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_arm #define tcg_gen_gvec_and tcg_gen_gvec_and_arm #define tcg_gen_gvec_andc tcg_gen_gvec_andc_arm +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_arm +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_arm #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_arm #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_arm #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_arm @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_arm #define tcg_gen_gvec_mov tcg_gen_gvec_mov_arm #define tcg_gen_gvec_mul tcg_gen_gvec_mul_arm +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_arm +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_arm +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_arm +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_arm +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_arm +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_arm #define tcg_gen_gvec_neg tcg_gen_gvec_neg_arm #define tcg_gen_gvec_not tcg_gen_gvec_not_arm #define tcg_gen_gvec_or tcg_gen_gvec_or_arm #define tcg_gen_gvec_orc tcg_gen_gvec_orc_arm +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_arm +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_arm #define tcg_gen_gvec_sari tcg_gen_gvec_sari_arm #define tcg_gen_gvec_shli tcg_gen_gvec_shli_arm #define tcg_gen_gvec_shri tcg_gen_gvec_shri_arm #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_arm #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_arm #define tcg_gen_gvec_sub tcg_gen_gvec_sub_arm +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_arm +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_arm +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_arm +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_arm +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_arm #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_arm #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_arm #define tcg_gen_gvec_xor tcg_gen_gvec_xor_arm +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_arm +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_arm #define tcg_gen_insn_start tcg_gen_insn_start_arm #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_arm #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_arm diff --git a/qemu/armeb.h b/qemu/armeb.h index ff8dceda..198d5371 100644 --- a/qemu/armeb.h +++ b/qemu/armeb.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_armeb #define helper_gvec_add32 helper_gvec_add32_armeb #define helper_gvec_add64 helper_gvec_add64_armeb +#define helper_gvec_adds8 helper_gvec_adds8_armeb +#define helper_gvec_adds16 helper_gvec_adds16_armeb +#define helper_gvec_adds32 helper_gvec_adds32_armeb +#define helper_gvec_adds64 helper_gvec_adds64_armeb #define helper_gvec_and helper_gvec_and_armeb #define helper_gvec_andc helper_gvec_andc_armeb +#define helper_gvec_ands helper_gvec_ands_armeb #define helper_gvec_dup8 helper_gvec_dup8_armeb #define helper_gvec_dup16 helper_gvec_dup16_armeb #define helper_gvec_dup32 helper_gvec_dup32_armeb @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_armeb #define helper_gvec_mul32 helper_gvec_mul32_armeb #define helper_gvec_mul64 helper_gvec_mul64_armeb +#define helper_gvec_muls8 helper_gvec_muls8_armeb +#define helper_gvec_muls16 helper_gvec_muls16_armeb +#define helper_gvec_muls32 helper_gvec_muls32_armeb +#define helper_gvec_muls64 helper_gvec_muls64_armeb #define helper_gvec_ne8 helper_gvec_ne8_armeb #define helper_gvec_ne16 helper_gvec_ne16_armeb #define helper_gvec_ne32 helper_gvec_ne32_armeb @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_armeb #define helper_gvec_or helper_gvec_or_armeb #define helper_gvec_orc helper_gvec_orc_armeb +#define helper_gvec_ors helper_gvec_ors_armeb #define helper_gvec_sar8i helper_gvec_sar8i_armeb #define helper_gvec_sar16i helper_gvec_sar16i_armeb #define helper_gvec_sar32i helper_gvec_sar32i_armeb @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_armeb #define helper_gvec_sub32 helper_gvec_sub32_armeb #define helper_gvec_sub64 helper_gvec_sub64_armeb +#define helper_gvec_subs8 helper_gvec_subs8_armeb +#define helper_gvec_subs16 helper_gvec_subs16_armeb +#define helper_gvec_subs32 helper_gvec_subs32_armeb +#define helper_gvec_subs64 helper_gvec_subs64_armeb #define helper_gvec_ssadd8 helper_gvec_ssadd8_armeb #define helper_gvec_ssadd16 helper_gvec_ssadd16_armeb #define helper_gvec_ssadd32 helper_gvec_ssadd32_armeb @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_armeb #define helper_gvec_ussub64 helper_gvec_ussub64_armeb #define helper_gvec_xor helper_gvec_xor_armeb +#define helper_gvec_xors helper_gvec_xors_armeb #define helper_iwmmxt_addcb helper_iwmmxt_addcb_armeb #define helper_iwmmxt_addcl helper_iwmmxt_addcl_armeb #define helper_iwmmxt_addcw helper_iwmmxt_addcw_armeb @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_armeb #define tcg_gen_gvec_2 tcg_gen_gvec_2_armeb #define tcg_gen_gvec_2i tcg_gen_gvec_2i_armeb +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_armeb +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_armeb #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_armeb #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_armeb #define tcg_gen_gvec_3 tcg_gen_gvec_3_armeb @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_armeb #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_armeb #define tcg_gen_gvec_add tcg_gen_gvec_add_armeb +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_armeb +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_armeb +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_armeb +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_armeb +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_armeb +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_armeb #define tcg_gen_gvec_and tcg_gen_gvec_and_armeb #define tcg_gen_gvec_andc tcg_gen_gvec_andc_armeb +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_armeb +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_armeb #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_armeb #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_armeb #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_armeb @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_armeb #define tcg_gen_gvec_mov tcg_gen_gvec_mov_armeb #define tcg_gen_gvec_mul tcg_gen_gvec_mul_armeb +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_armeb +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_armeb +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_armeb +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_armeb +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_armeb +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_armeb #define tcg_gen_gvec_neg tcg_gen_gvec_neg_armeb #define tcg_gen_gvec_not tcg_gen_gvec_not_armeb #define tcg_gen_gvec_or tcg_gen_gvec_or_armeb #define tcg_gen_gvec_orc tcg_gen_gvec_orc_armeb +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_armeb +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_armeb #define tcg_gen_gvec_sari tcg_gen_gvec_sari_armeb #define tcg_gen_gvec_shli tcg_gen_gvec_shli_armeb #define tcg_gen_gvec_shri tcg_gen_gvec_shri_armeb #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_armeb #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_armeb #define tcg_gen_gvec_sub tcg_gen_gvec_sub_armeb +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_armeb +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_armeb +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_armeb +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_armeb +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_armeb #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_armeb #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_armeb #define tcg_gen_gvec_xor tcg_gen_gvec_xor_armeb +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_armeb +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_armeb #define tcg_gen_insn_start tcg_gen_insn_start_armeb #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_armeb #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_armeb diff --git a/qemu/header_gen.py b/qemu/header_gen.py index 43eda037..ac4c3acb 100644 --- a/qemu/header_gen.py +++ b/qemu/header_gen.py @@ -1619,8 +1619,13 @@ symbols = ( 'helper_gvec_add16', 'helper_gvec_add32', 'helper_gvec_add64', + 'helper_gvec_adds8', + 'helper_gvec_adds16', + 'helper_gvec_adds32', + 'helper_gvec_adds64', 'helper_gvec_and', 'helper_gvec_andc', + 'helper_gvec_ands', 'helper_gvec_dup8', 'helper_gvec_dup16', 'helper_gvec_dup32', @@ -1650,6 +1655,10 @@ symbols = ( 'helper_gvec_mul16', 'helper_gvec_mul32', 'helper_gvec_mul64', + 'helper_gvec_muls8', + 'helper_gvec_muls16', + 'helper_gvec_muls32', + 'helper_gvec_muls64', 'helper_gvec_ne8', 'helper_gvec_ne16', 'helper_gvec_ne32', @@ -1661,6 +1670,7 @@ symbols = ( 'helper_gvec_not', 'helper_gvec_or', 'helper_gvec_orc', + 'helper_gvec_ors', 'helper_gvec_sar8i', 'helper_gvec_sar16i', 'helper_gvec_sar32i', @@ -1677,6 +1687,10 @@ symbols = ( 'helper_gvec_sub16', 'helper_gvec_sub32', 'helper_gvec_sub64', + 'helper_gvec_subs8', + 'helper_gvec_subs16', + 'helper_gvec_subs32', + 'helper_gvec_subs64', 'helper_gvec_ssadd8', 'helper_gvec_ssadd16', 'helper_gvec_ssadd32', @@ -1694,6 +1708,7 @@ symbols = ( 'helper_gvec_ussub32', 'helper_gvec_ussub64', 'helper_gvec_xor', + 'helper_gvec_xors', 'helper_iwmmxt_addcb', 'helper_iwmmxt_addcl', 'helper_iwmmxt_addcw', @@ -3178,6 +3193,8 @@ symbols = ( 'tcg_gen_goto_tb', 'tcg_gen_gvec_2', 'tcg_gen_gvec_2i', + 'tcg_gen_gvec_2i_ool', + 'tcg_gen_gvec_2s', 'tcg_gen_gvec_2_ool', 'tcg_gen_gvec_2_ptr', 'tcg_gen_gvec_3', @@ -3188,8 +3205,16 @@ symbols = ( 'tcg_gen_gvec_4_ptr', 'tcg_gen_gvec_5_ool', 'tcg_gen_gvec_add', + 'tcg_gen_gvec_addi', + 'tcg_gen_gvec_adds', + 'tcg_gen_gvec_adds8', + 'tcg_gen_gvec_adds16', + 'tcg_gen_gvec_adds32', + 'tcg_gen_gvec_adds64', 'tcg_gen_gvec_and', 'tcg_gen_gvec_andc', + 'tcg_gen_gvec_andi', + 'tcg_gen_gvec_ands', 'tcg_gen_gvec_cmp', 'tcg_gen_gvec_dup8i', 'tcg_gen_gvec_dup16i', @@ -3200,19 +3225,34 @@ symbols = ( 'tcg_gen_gvec_dup_mem', 'tcg_gen_gvec_mov', 'tcg_gen_gvec_mul', + 'tcg_gen_gvec_muli', + 'tcg_gen_gvec_muls', + 'tcg_gen_gvec_muls8', + 'tcg_gen_gvec_muls16', + 'tcg_gen_gvec_muls32', + 'tcg_gen_gvec_muls64', 'tcg_gen_gvec_neg', 'tcg_gen_gvec_not', 'tcg_gen_gvec_or', 'tcg_gen_gvec_orc', + 'tcg_gen_gvec_ori', + 'tcg_gen_gvec_ors', 'tcg_gen_gvec_sari', 'tcg_gen_gvec_shli', 'tcg_gen_gvec_shri', 'tcg_gen_gvec_ssadd', 'tcg_gen_gvec_sssub', 'tcg_gen_gvec_sub', + 'tcg_gen_gvec_subs', + 'tcg_gen_gvec_subs8', + 'tcg_gen_gvec_subs16', + 'tcg_gen_gvec_subs32', + 'tcg_gen_gvec_subs64', 'tcg_gen_gvec_usadd', 'tcg_gen_gvec_ussub', 'tcg_gen_gvec_xor', + 'tcg_gen_gvec_xori', + 'tcg_gen_gvec_xors', 'tcg_gen_insn_start', 'tcg_gen_ld16s_i64', 'tcg_gen_ld16u_i64', diff --git a/qemu/m68k.h b/qemu/m68k.h index 1b8e29df..96751613 100644 --- a/qemu/m68k.h +++ b/qemu/m68k.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_m68k #define helper_gvec_add32 helper_gvec_add32_m68k #define helper_gvec_add64 helper_gvec_add64_m68k +#define helper_gvec_adds8 helper_gvec_adds8_m68k +#define helper_gvec_adds16 helper_gvec_adds16_m68k +#define helper_gvec_adds32 helper_gvec_adds32_m68k +#define helper_gvec_adds64 helper_gvec_adds64_m68k #define helper_gvec_and helper_gvec_and_m68k #define helper_gvec_andc helper_gvec_andc_m68k +#define helper_gvec_ands helper_gvec_ands_m68k #define helper_gvec_dup8 helper_gvec_dup8_m68k #define helper_gvec_dup16 helper_gvec_dup16_m68k #define helper_gvec_dup32 helper_gvec_dup32_m68k @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_m68k #define helper_gvec_mul32 helper_gvec_mul32_m68k #define helper_gvec_mul64 helper_gvec_mul64_m68k +#define helper_gvec_muls8 helper_gvec_muls8_m68k +#define helper_gvec_muls16 helper_gvec_muls16_m68k +#define helper_gvec_muls32 helper_gvec_muls32_m68k +#define helper_gvec_muls64 helper_gvec_muls64_m68k #define helper_gvec_ne8 helper_gvec_ne8_m68k #define helper_gvec_ne16 helper_gvec_ne16_m68k #define helper_gvec_ne32 helper_gvec_ne32_m68k @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_m68k #define helper_gvec_or helper_gvec_or_m68k #define helper_gvec_orc helper_gvec_orc_m68k +#define helper_gvec_ors helper_gvec_ors_m68k #define helper_gvec_sar8i helper_gvec_sar8i_m68k #define helper_gvec_sar16i helper_gvec_sar16i_m68k #define helper_gvec_sar32i helper_gvec_sar32i_m68k @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_m68k #define helper_gvec_sub32 helper_gvec_sub32_m68k #define helper_gvec_sub64 helper_gvec_sub64_m68k +#define helper_gvec_subs8 helper_gvec_subs8_m68k +#define helper_gvec_subs16 helper_gvec_subs16_m68k +#define helper_gvec_subs32 helper_gvec_subs32_m68k +#define helper_gvec_subs64 helper_gvec_subs64_m68k #define helper_gvec_ssadd8 helper_gvec_ssadd8_m68k #define helper_gvec_ssadd16 helper_gvec_ssadd16_m68k #define helper_gvec_ssadd32 helper_gvec_ssadd32_m68k @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_m68k #define helper_gvec_ussub64 helper_gvec_ussub64_m68k #define helper_gvec_xor helper_gvec_xor_m68k +#define helper_gvec_xors helper_gvec_xors_m68k #define helper_iwmmxt_addcb helper_iwmmxt_addcb_m68k #define helper_iwmmxt_addcl helper_iwmmxt_addcl_m68k #define helper_iwmmxt_addcw helper_iwmmxt_addcw_m68k @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_m68k #define tcg_gen_gvec_2 tcg_gen_gvec_2_m68k #define tcg_gen_gvec_2i tcg_gen_gvec_2i_m68k +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_m68k +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_m68k #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_m68k #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_m68k #define tcg_gen_gvec_3 tcg_gen_gvec_3_m68k @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_m68k #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_m68k #define tcg_gen_gvec_add tcg_gen_gvec_add_m68k +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_m68k +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_m68k +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_m68k +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_m68k +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_m68k +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_m68k #define tcg_gen_gvec_and tcg_gen_gvec_and_m68k #define tcg_gen_gvec_andc tcg_gen_gvec_andc_m68k +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_m68k +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_m68k #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_m68k #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_m68k #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_m68k @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_m68k #define tcg_gen_gvec_mov tcg_gen_gvec_mov_m68k #define tcg_gen_gvec_mul tcg_gen_gvec_mul_m68k +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_m68k +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_m68k +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_m68k +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_m68k +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_m68k +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_m68k #define tcg_gen_gvec_neg tcg_gen_gvec_neg_m68k #define tcg_gen_gvec_not tcg_gen_gvec_not_m68k #define tcg_gen_gvec_or tcg_gen_gvec_or_m68k #define tcg_gen_gvec_orc tcg_gen_gvec_orc_m68k +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_m68k +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_m68k #define tcg_gen_gvec_sari tcg_gen_gvec_sari_m68k #define tcg_gen_gvec_shli tcg_gen_gvec_shli_m68k #define tcg_gen_gvec_shri tcg_gen_gvec_shri_m68k #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_m68k #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_m68k #define tcg_gen_gvec_sub tcg_gen_gvec_sub_m68k +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_m68k +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_m68k +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_m68k +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_m68k +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_m68k #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_m68k #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_m68k #define tcg_gen_gvec_xor tcg_gen_gvec_xor_m68k +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_m68k +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_m68k #define tcg_gen_insn_start tcg_gen_insn_start_m68k #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_m68k #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_m68k diff --git a/qemu/mips.h b/qemu/mips.h index 1af32390..257a9275 100644 --- a/qemu/mips.h +++ b/qemu/mips.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_mips #define helper_gvec_add32 helper_gvec_add32_mips #define helper_gvec_add64 helper_gvec_add64_mips +#define helper_gvec_adds8 helper_gvec_adds8_mips +#define helper_gvec_adds16 helper_gvec_adds16_mips +#define helper_gvec_adds32 helper_gvec_adds32_mips +#define helper_gvec_adds64 helper_gvec_adds64_mips #define helper_gvec_and helper_gvec_and_mips #define helper_gvec_andc helper_gvec_andc_mips +#define helper_gvec_ands helper_gvec_ands_mips #define helper_gvec_dup8 helper_gvec_dup8_mips #define helper_gvec_dup16 helper_gvec_dup16_mips #define helper_gvec_dup32 helper_gvec_dup32_mips @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_mips #define helper_gvec_mul32 helper_gvec_mul32_mips #define helper_gvec_mul64 helper_gvec_mul64_mips +#define helper_gvec_muls8 helper_gvec_muls8_mips +#define helper_gvec_muls16 helper_gvec_muls16_mips +#define helper_gvec_muls32 helper_gvec_muls32_mips +#define helper_gvec_muls64 helper_gvec_muls64_mips #define helper_gvec_ne8 helper_gvec_ne8_mips #define helper_gvec_ne16 helper_gvec_ne16_mips #define helper_gvec_ne32 helper_gvec_ne32_mips @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_mips #define helper_gvec_or helper_gvec_or_mips #define helper_gvec_orc helper_gvec_orc_mips +#define helper_gvec_ors helper_gvec_ors_mips #define helper_gvec_sar8i helper_gvec_sar8i_mips #define helper_gvec_sar16i helper_gvec_sar16i_mips #define helper_gvec_sar32i helper_gvec_sar32i_mips @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_mips #define helper_gvec_sub32 helper_gvec_sub32_mips #define helper_gvec_sub64 helper_gvec_sub64_mips +#define helper_gvec_subs8 helper_gvec_subs8_mips +#define helper_gvec_subs16 helper_gvec_subs16_mips +#define helper_gvec_subs32 helper_gvec_subs32_mips +#define helper_gvec_subs64 helper_gvec_subs64_mips #define helper_gvec_ssadd8 helper_gvec_ssadd8_mips #define helper_gvec_ssadd16 helper_gvec_ssadd16_mips #define helper_gvec_ssadd32 helper_gvec_ssadd32_mips @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_mips #define helper_gvec_ussub64 helper_gvec_ussub64_mips #define helper_gvec_xor helper_gvec_xor_mips +#define helper_gvec_xors helper_gvec_xors_mips #define helper_iwmmxt_addcb helper_iwmmxt_addcb_mips #define helper_iwmmxt_addcl helper_iwmmxt_addcl_mips #define helper_iwmmxt_addcw helper_iwmmxt_addcw_mips @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_mips #define tcg_gen_gvec_2 tcg_gen_gvec_2_mips #define tcg_gen_gvec_2i tcg_gen_gvec_2i_mips +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_mips +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_mips #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_mips #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_mips #define tcg_gen_gvec_3 tcg_gen_gvec_3_mips @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_mips #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_mips #define tcg_gen_gvec_add tcg_gen_gvec_add_mips +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_mips +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_mips +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_mips +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_mips +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_mips +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_mips #define tcg_gen_gvec_and tcg_gen_gvec_and_mips #define tcg_gen_gvec_andc tcg_gen_gvec_andc_mips +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_mips +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_mips #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_mips #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_mips #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_mips @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips #define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips #define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mips +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_mips +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_mips +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mips +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mips +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mips #define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips #define tcg_gen_gvec_not tcg_gen_gvec_not_mips #define tcg_gen_gvec_or tcg_gen_gvec_or_mips #define tcg_gen_gvec_orc tcg_gen_gvec_orc_mips +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_mips +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_mips #define tcg_gen_gvec_sari tcg_gen_gvec_sari_mips #define tcg_gen_gvec_shli tcg_gen_gvec_shli_mips #define tcg_gen_gvec_shri tcg_gen_gvec_shri_mips #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_mips #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_mips #define tcg_gen_gvec_sub tcg_gen_gvec_sub_mips +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_mips +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_mips +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_mips +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_mips +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_mips #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_mips #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_mips #define tcg_gen_gvec_xor tcg_gen_gvec_xor_mips +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_mips +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_mips #define tcg_gen_insn_start tcg_gen_insn_start_mips #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_mips #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_mips diff --git a/qemu/mips64.h b/qemu/mips64.h index 92013056..238a9307 100644 --- a/qemu/mips64.h +++ b/qemu/mips64.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_mips64 #define helper_gvec_add32 helper_gvec_add32_mips64 #define helper_gvec_add64 helper_gvec_add64_mips64 +#define helper_gvec_adds8 helper_gvec_adds8_mips64 +#define helper_gvec_adds16 helper_gvec_adds16_mips64 +#define helper_gvec_adds32 helper_gvec_adds32_mips64 +#define helper_gvec_adds64 helper_gvec_adds64_mips64 #define helper_gvec_and helper_gvec_and_mips64 #define helper_gvec_andc helper_gvec_andc_mips64 +#define helper_gvec_ands helper_gvec_ands_mips64 #define helper_gvec_dup8 helper_gvec_dup8_mips64 #define helper_gvec_dup16 helper_gvec_dup16_mips64 #define helper_gvec_dup32 helper_gvec_dup32_mips64 @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_mips64 #define helper_gvec_mul32 helper_gvec_mul32_mips64 #define helper_gvec_mul64 helper_gvec_mul64_mips64 +#define helper_gvec_muls8 helper_gvec_muls8_mips64 +#define helper_gvec_muls16 helper_gvec_muls16_mips64 +#define helper_gvec_muls32 helper_gvec_muls32_mips64 +#define helper_gvec_muls64 helper_gvec_muls64_mips64 #define helper_gvec_ne8 helper_gvec_ne8_mips64 #define helper_gvec_ne16 helper_gvec_ne16_mips64 #define helper_gvec_ne32 helper_gvec_ne32_mips64 @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_mips64 #define helper_gvec_or helper_gvec_or_mips64 #define helper_gvec_orc helper_gvec_orc_mips64 +#define helper_gvec_ors helper_gvec_ors_mips64 #define helper_gvec_sar8i helper_gvec_sar8i_mips64 #define helper_gvec_sar16i helper_gvec_sar16i_mips64 #define helper_gvec_sar32i helper_gvec_sar32i_mips64 @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_mips64 #define helper_gvec_sub32 helper_gvec_sub32_mips64 #define helper_gvec_sub64 helper_gvec_sub64_mips64 +#define helper_gvec_subs8 helper_gvec_subs8_mips64 +#define helper_gvec_subs16 helper_gvec_subs16_mips64 +#define helper_gvec_subs32 helper_gvec_subs32_mips64 +#define helper_gvec_subs64 helper_gvec_subs64_mips64 #define helper_gvec_ssadd8 helper_gvec_ssadd8_mips64 #define helper_gvec_ssadd16 helper_gvec_ssadd16_mips64 #define helper_gvec_ssadd32 helper_gvec_ssadd32_mips64 @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_mips64 #define helper_gvec_ussub64 helper_gvec_ussub64_mips64 #define helper_gvec_xor helper_gvec_xor_mips64 +#define helper_gvec_xors helper_gvec_xors_mips64 #define helper_iwmmxt_addcb helper_iwmmxt_addcb_mips64 #define helper_iwmmxt_addcl helper_iwmmxt_addcl_mips64 #define helper_iwmmxt_addcw helper_iwmmxt_addcw_mips64 @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_mips64 #define tcg_gen_gvec_2 tcg_gen_gvec_2_mips64 #define tcg_gen_gvec_2i tcg_gen_gvec_2i_mips64 +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_mips64 +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_mips64 #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_mips64 #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_mips64 #define tcg_gen_gvec_3 tcg_gen_gvec_3_mips64 @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_mips64 #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_mips64 #define tcg_gen_gvec_add tcg_gen_gvec_add_mips64 +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_mips64 +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_mips64 +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_mips64 +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_mips64 +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_mips64 +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_mips64 #define tcg_gen_gvec_and tcg_gen_gvec_and_mips64 #define tcg_gen_gvec_andc tcg_gen_gvec_andc_mips64 +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_mips64 +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_mips64 #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_mips64 #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_mips64 #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_mips64 @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips64 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips64 #define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips64 +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mips64 +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_mips64 +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_mips64 +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mips64 +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mips64 +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mips64 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips64 #define tcg_gen_gvec_not tcg_gen_gvec_not_mips64 #define tcg_gen_gvec_or tcg_gen_gvec_or_mips64 #define tcg_gen_gvec_orc tcg_gen_gvec_orc_mips64 +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_mips64 +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_mips64 #define tcg_gen_gvec_sari tcg_gen_gvec_sari_mips64 #define tcg_gen_gvec_shli tcg_gen_gvec_shli_mips64 #define tcg_gen_gvec_shri tcg_gen_gvec_shri_mips64 #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_mips64 #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_mips64 #define tcg_gen_gvec_sub tcg_gen_gvec_sub_mips64 +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_mips64 +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_mips64 +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_mips64 +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_mips64 +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_mips64 #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_mips64 #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_mips64 #define tcg_gen_gvec_xor tcg_gen_gvec_xor_mips64 +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_mips64 +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_mips64 #define tcg_gen_insn_start tcg_gen_insn_start_mips64 #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_mips64 #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_mips64 diff --git a/qemu/mips64el.h b/qemu/mips64el.h index aa632ad9..ff87cb03 100644 --- a/qemu/mips64el.h +++ b/qemu/mips64el.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_mips64el #define helper_gvec_add32 helper_gvec_add32_mips64el #define helper_gvec_add64 helper_gvec_add64_mips64el +#define helper_gvec_adds8 helper_gvec_adds8_mips64el +#define helper_gvec_adds16 helper_gvec_adds16_mips64el +#define helper_gvec_adds32 helper_gvec_adds32_mips64el +#define helper_gvec_adds64 helper_gvec_adds64_mips64el #define helper_gvec_and helper_gvec_and_mips64el #define helper_gvec_andc helper_gvec_andc_mips64el +#define helper_gvec_ands helper_gvec_ands_mips64el #define helper_gvec_dup8 helper_gvec_dup8_mips64el #define helper_gvec_dup16 helper_gvec_dup16_mips64el #define helper_gvec_dup32 helper_gvec_dup32_mips64el @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_mips64el #define helper_gvec_mul32 helper_gvec_mul32_mips64el #define helper_gvec_mul64 helper_gvec_mul64_mips64el +#define helper_gvec_muls8 helper_gvec_muls8_mips64el +#define helper_gvec_muls16 helper_gvec_muls16_mips64el +#define helper_gvec_muls32 helper_gvec_muls32_mips64el +#define helper_gvec_muls64 helper_gvec_muls64_mips64el #define helper_gvec_ne8 helper_gvec_ne8_mips64el #define helper_gvec_ne16 helper_gvec_ne16_mips64el #define helper_gvec_ne32 helper_gvec_ne32_mips64el @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_mips64el #define helper_gvec_or helper_gvec_or_mips64el #define helper_gvec_orc helper_gvec_orc_mips64el +#define helper_gvec_ors helper_gvec_ors_mips64el #define helper_gvec_sar8i helper_gvec_sar8i_mips64el #define helper_gvec_sar16i helper_gvec_sar16i_mips64el #define helper_gvec_sar32i helper_gvec_sar32i_mips64el @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_mips64el #define helper_gvec_sub32 helper_gvec_sub32_mips64el #define helper_gvec_sub64 helper_gvec_sub64_mips64el +#define helper_gvec_subs8 helper_gvec_subs8_mips64el +#define helper_gvec_subs16 helper_gvec_subs16_mips64el +#define helper_gvec_subs32 helper_gvec_subs32_mips64el +#define helper_gvec_subs64 helper_gvec_subs64_mips64el #define helper_gvec_ssadd8 helper_gvec_ssadd8_mips64el #define helper_gvec_ssadd16 helper_gvec_ssadd16_mips64el #define helper_gvec_ssadd32 helper_gvec_ssadd32_mips64el @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_mips64el #define helper_gvec_ussub64 helper_gvec_ussub64_mips64el #define helper_gvec_xor helper_gvec_xor_mips64el +#define helper_gvec_xors helper_gvec_xors_mips64el #define helper_iwmmxt_addcb helper_iwmmxt_addcb_mips64el #define helper_iwmmxt_addcl helper_iwmmxt_addcl_mips64el #define helper_iwmmxt_addcw helper_iwmmxt_addcw_mips64el @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_mips64el #define tcg_gen_gvec_2 tcg_gen_gvec_2_mips64el #define tcg_gen_gvec_2i tcg_gen_gvec_2i_mips64el +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_mips64el +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_mips64el #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_mips64el #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_mips64el #define tcg_gen_gvec_3 tcg_gen_gvec_3_mips64el @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_mips64el #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_mips64el #define tcg_gen_gvec_add tcg_gen_gvec_add_mips64el +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_mips64el +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_mips64el +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_mips64el +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_mips64el +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_mips64el +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_mips64el #define tcg_gen_gvec_and tcg_gen_gvec_and_mips64el #define tcg_gen_gvec_andc tcg_gen_gvec_andc_mips64el +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_mips64el +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_mips64el #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_mips64el #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_mips64el #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_mips64el @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips64el #define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips64el #define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips64el +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mips64el +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_mips64el +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_mips64el +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mips64el +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mips64el +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mips64el #define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips64el #define tcg_gen_gvec_not tcg_gen_gvec_not_mips64el #define tcg_gen_gvec_or tcg_gen_gvec_or_mips64el #define tcg_gen_gvec_orc tcg_gen_gvec_orc_mips64el +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_mips64el +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_mips64el #define tcg_gen_gvec_sari tcg_gen_gvec_sari_mips64el #define tcg_gen_gvec_shli tcg_gen_gvec_shli_mips64el #define tcg_gen_gvec_shri tcg_gen_gvec_shri_mips64el #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_mips64el #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_mips64el #define tcg_gen_gvec_sub tcg_gen_gvec_sub_mips64el +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_mips64el +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_mips64el +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_mips64el +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_mips64el +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_mips64el #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_mips64el #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_mips64el #define tcg_gen_gvec_xor tcg_gen_gvec_xor_mips64el +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_mips64el +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_mips64el #define tcg_gen_insn_start tcg_gen_insn_start_mips64el #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_mips64el #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_mips64el diff --git a/qemu/mipsel.h b/qemu/mipsel.h index 3905b998..dab03c43 100644 --- a/qemu/mipsel.h +++ b/qemu/mipsel.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_mipsel #define helper_gvec_add32 helper_gvec_add32_mipsel #define helper_gvec_add64 helper_gvec_add64_mipsel +#define helper_gvec_adds8 helper_gvec_adds8_mipsel +#define helper_gvec_adds16 helper_gvec_adds16_mipsel +#define helper_gvec_adds32 helper_gvec_adds32_mipsel +#define helper_gvec_adds64 helper_gvec_adds64_mipsel #define helper_gvec_and helper_gvec_and_mipsel #define helper_gvec_andc helper_gvec_andc_mipsel +#define helper_gvec_ands helper_gvec_ands_mipsel #define helper_gvec_dup8 helper_gvec_dup8_mipsel #define helper_gvec_dup16 helper_gvec_dup16_mipsel #define helper_gvec_dup32 helper_gvec_dup32_mipsel @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_mipsel #define helper_gvec_mul32 helper_gvec_mul32_mipsel #define helper_gvec_mul64 helper_gvec_mul64_mipsel +#define helper_gvec_muls8 helper_gvec_muls8_mipsel +#define helper_gvec_muls16 helper_gvec_muls16_mipsel +#define helper_gvec_muls32 helper_gvec_muls32_mipsel +#define helper_gvec_muls64 helper_gvec_muls64_mipsel #define helper_gvec_ne8 helper_gvec_ne8_mipsel #define helper_gvec_ne16 helper_gvec_ne16_mipsel #define helper_gvec_ne32 helper_gvec_ne32_mipsel @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_mipsel #define helper_gvec_or helper_gvec_or_mipsel #define helper_gvec_orc helper_gvec_orc_mipsel +#define helper_gvec_ors helper_gvec_ors_mipsel #define helper_gvec_sar8i helper_gvec_sar8i_mipsel #define helper_gvec_sar16i helper_gvec_sar16i_mipsel #define helper_gvec_sar32i helper_gvec_sar32i_mipsel @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_mipsel #define helper_gvec_sub32 helper_gvec_sub32_mipsel #define helper_gvec_sub64 helper_gvec_sub64_mipsel +#define helper_gvec_subs8 helper_gvec_subs8_mipsel +#define helper_gvec_subs16 helper_gvec_subs16_mipsel +#define helper_gvec_subs32 helper_gvec_subs32_mipsel +#define helper_gvec_subs64 helper_gvec_subs64_mipsel #define helper_gvec_ssadd8 helper_gvec_ssadd8_mipsel #define helper_gvec_ssadd16 helper_gvec_ssadd16_mipsel #define helper_gvec_ssadd32 helper_gvec_ssadd32_mipsel @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_mipsel #define helper_gvec_ussub64 helper_gvec_ussub64_mipsel #define helper_gvec_xor helper_gvec_xor_mipsel +#define helper_gvec_xors helper_gvec_xors_mipsel #define helper_iwmmxt_addcb helper_iwmmxt_addcb_mipsel #define helper_iwmmxt_addcl helper_iwmmxt_addcl_mipsel #define helper_iwmmxt_addcw helper_iwmmxt_addcw_mipsel @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_mipsel #define tcg_gen_gvec_2 tcg_gen_gvec_2_mipsel #define tcg_gen_gvec_2i tcg_gen_gvec_2i_mipsel +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_mipsel +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_mipsel #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_mipsel #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_mipsel #define tcg_gen_gvec_3 tcg_gen_gvec_3_mipsel @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_mipsel #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_mipsel #define tcg_gen_gvec_add tcg_gen_gvec_add_mipsel +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_mipsel +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_mipsel +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_mipsel +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_mipsel +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_mipsel +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_mipsel #define tcg_gen_gvec_and tcg_gen_gvec_and_mipsel #define tcg_gen_gvec_andc tcg_gen_gvec_andc_mipsel +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_mipsel +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_mipsel #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_mipsel #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_mipsel #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_mipsel @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mipsel #define tcg_gen_gvec_mov tcg_gen_gvec_mov_mipsel #define tcg_gen_gvec_mul tcg_gen_gvec_mul_mipsel +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mipsel +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_mipsel +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_mipsel +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_mipsel +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_mipsel +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_mipsel #define tcg_gen_gvec_neg tcg_gen_gvec_neg_mipsel #define tcg_gen_gvec_not tcg_gen_gvec_not_mipsel #define tcg_gen_gvec_or tcg_gen_gvec_or_mipsel #define tcg_gen_gvec_orc tcg_gen_gvec_orc_mipsel +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_mipsel +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_mipsel #define tcg_gen_gvec_sari tcg_gen_gvec_sari_mipsel #define tcg_gen_gvec_shli tcg_gen_gvec_shli_mipsel #define tcg_gen_gvec_shri tcg_gen_gvec_shri_mipsel #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_mipsel #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_mipsel #define tcg_gen_gvec_sub tcg_gen_gvec_sub_mipsel +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_mipsel +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_mipsel +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_mipsel +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_mipsel +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_mipsel #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_mipsel #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_mipsel #define tcg_gen_gvec_xor tcg_gen_gvec_xor_mipsel +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_mipsel +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_mipsel #define tcg_gen_insn_start tcg_gen_insn_start_mipsel #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_mipsel #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_mipsel diff --git a/qemu/powerpc.h b/qemu/powerpc.h index 0d180033..248004aa 100644 --- a/qemu/powerpc.h +++ b/qemu/powerpc.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_powerpc #define helper_gvec_add32 helper_gvec_add32_powerpc #define helper_gvec_add64 helper_gvec_add64_powerpc +#define helper_gvec_adds8 helper_gvec_adds8_powerpc +#define helper_gvec_adds16 helper_gvec_adds16_powerpc +#define helper_gvec_adds32 helper_gvec_adds32_powerpc +#define helper_gvec_adds64 helper_gvec_adds64_powerpc #define helper_gvec_and helper_gvec_and_powerpc #define helper_gvec_andc helper_gvec_andc_powerpc +#define helper_gvec_ands helper_gvec_ands_powerpc #define helper_gvec_dup8 helper_gvec_dup8_powerpc #define helper_gvec_dup16 helper_gvec_dup16_powerpc #define helper_gvec_dup32 helper_gvec_dup32_powerpc @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_powerpc #define helper_gvec_mul32 helper_gvec_mul32_powerpc #define helper_gvec_mul64 helper_gvec_mul64_powerpc +#define helper_gvec_muls8 helper_gvec_muls8_powerpc +#define helper_gvec_muls16 helper_gvec_muls16_powerpc +#define helper_gvec_muls32 helper_gvec_muls32_powerpc +#define helper_gvec_muls64 helper_gvec_muls64_powerpc #define helper_gvec_ne8 helper_gvec_ne8_powerpc #define helper_gvec_ne16 helper_gvec_ne16_powerpc #define helper_gvec_ne32 helper_gvec_ne32_powerpc @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_powerpc #define helper_gvec_or helper_gvec_or_powerpc #define helper_gvec_orc helper_gvec_orc_powerpc +#define helper_gvec_ors helper_gvec_ors_powerpc #define helper_gvec_sar8i helper_gvec_sar8i_powerpc #define helper_gvec_sar16i helper_gvec_sar16i_powerpc #define helper_gvec_sar32i helper_gvec_sar32i_powerpc @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_powerpc #define helper_gvec_sub32 helper_gvec_sub32_powerpc #define helper_gvec_sub64 helper_gvec_sub64_powerpc +#define helper_gvec_subs8 helper_gvec_subs8_powerpc +#define helper_gvec_subs16 helper_gvec_subs16_powerpc +#define helper_gvec_subs32 helper_gvec_subs32_powerpc +#define helper_gvec_subs64 helper_gvec_subs64_powerpc #define helper_gvec_ssadd8 helper_gvec_ssadd8_powerpc #define helper_gvec_ssadd16 helper_gvec_ssadd16_powerpc #define helper_gvec_ssadd32 helper_gvec_ssadd32_powerpc @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_powerpc #define helper_gvec_ussub64 helper_gvec_ussub64_powerpc #define helper_gvec_xor helper_gvec_xor_powerpc +#define helper_gvec_xors helper_gvec_xors_powerpc #define helper_iwmmxt_addcb helper_iwmmxt_addcb_powerpc #define helper_iwmmxt_addcl helper_iwmmxt_addcl_powerpc #define helper_iwmmxt_addcw helper_iwmmxt_addcw_powerpc @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_powerpc #define tcg_gen_gvec_2 tcg_gen_gvec_2_powerpc #define tcg_gen_gvec_2i tcg_gen_gvec_2i_powerpc +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_powerpc +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_powerpc #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_powerpc #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_powerpc #define tcg_gen_gvec_3 tcg_gen_gvec_3_powerpc @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_powerpc #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_powerpc #define tcg_gen_gvec_add tcg_gen_gvec_add_powerpc +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_powerpc +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_powerpc +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_powerpc +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_powerpc +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_powerpc +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_powerpc #define tcg_gen_gvec_and tcg_gen_gvec_and_powerpc #define tcg_gen_gvec_andc tcg_gen_gvec_andc_powerpc +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_powerpc +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_powerpc #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_powerpc #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_powerpc #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_powerpc @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_powerpc #define tcg_gen_gvec_mov tcg_gen_gvec_mov_powerpc #define tcg_gen_gvec_mul tcg_gen_gvec_mul_powerpc +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_powerpc +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_powerpc +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_powerpc +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_powerpc +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_powerpc +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_powerpc #define tcg_gen_gvec_neg tcg_gen_gvec_neg_powerpc #define tcg_gen_gvec_not tcg_gen_gvec_not_powerpc #define tcg_gen_gvec_or tcg_gen_gvec_or_powerpc #define tcg_gen_gvec_orc tcg_gen_gvec_orc_powerpc +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_powerpc +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_powerpc #define tcg_gen_gvec_sari tcg_gen_gvec_sari_powerpc #define tcg_gen_gvec_shli tcg_gen_gvec_shli_powerpc #define tcg_gen_gvec_shri tcg_gen_gvec_shri_powerpc #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_powerpc #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_powerpc #define tcg_gen_gvec_sub tcg_gen_gvec_sub_powerpc +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_powerpc +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_powerpc +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_powerpc +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_powerpc +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_powerpc #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_powerpc #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_powerpc #define tcg_gen_gvec_xor tcg_gen_gvec_xor_powerpc +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_powerpc +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_powerpc #define tcg_gen_insn_start tcg_gen_insn_start_powerpc #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_powerpc #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_powerpc diff --git a/qemu/sparc.h b/qemu/sparc.h index e4925bed..acf31919 100644 --- a/qemu/sparc.h +++ b/qemu/sparc.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_sparc #define helper_gvec_add32 helper_gvec_add32_sparc #define helper_gvec_add64 helper_gvec_add64_sparc +#define helper_gvec_adds8 helper_gvec_adds8_sparc +#define helper_gvec_adds16 helper_gvec_adds16_sparc +#define helper_gvec_adds32 helper_gvec_adds32_sparc +#define helper_gvec_adds64 helper_gvec_adds64_sparc #define helper_gvec_and helper_gvec_and_sparc #define helper_gvec_andc helper_gvec_andc_sparc +#define helper_gvec_ands helper_gvec_ands_sparc #define helper_gvec_dup8 helper_gvec_dup8_sparc #define helper_gvec_dup16 helper_gvec_dup16_sparc #define helper_gvec_dup32 helper_gvec_dup32_sparc @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_sparc #define helper_gvec_mul32 helper_gvec_mul32_sparc #define helper_gvec_mul64 helper_gvec_mul64_sparc +#define helper_gvec_muls8 helper_gvec_muls8_sparc +#define helper_gvec_muls16 helper_gvec_muls16_sparc +#define helper_gvec_muls32 helper_gvec_muls32_sparc +#define helper_gvec_muls64 helper_gvec_muls64_sparc #define helper_gvec_ne8 helper_gvec_ne8_sparc #define helper_gvec_ne16 helper_gvec_ne16_sparc #define helper_gvec_ne32 helper_gvec_ne32_sparc @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_sparc #define helper_gvec_or helper_gvec_or_sparc #define helper_gvec_orc helper_gvec_orc_sparc +#define helper_gvec_ors helper_gvec_ors_sparc #define helper_gvec_sar8i helper_gvec_sar8i_sparc #define helper_gvec_sar16i helper_gvec_sar16i_sparc #define helper_gvec_sar32i helper_gvec_sar32i_sparc @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_sparc #define helper_gvec_sub32 helper_gvec_sub32_sparc #define helper_gvec_sub64 helper_gvec_sub64_sparc +#define helper_gvec_subs8 helper_gvec_subs8_sparc +#define helper_gvec_subs16 helper_gvec_subs16_sparc +#define helper_gvec_subs32 helper_gvec_subs32_sparc +#define helper_gvec_subs64 helper_gvec_subs64_sparc #define helper_gvec_ssadd8 helper_gvec_ssadd8_sparc #define helper_gvec_ssadd16 helper_gvec_ssadd16_sparc #define helper_gvec_ssadd32 helper_gvec_ssadd32_sparc @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_sparc #define helper_gvec_ussub64 helper_gvec_ussub64_sparc #define helper_gvec_xor helper_gvec_xor_sparc +#define helper_gvec_xors helper_gvec_xors_sparc #define helper_iwmmxt_addcb helper_iwmmxt_addcb_sparc #define helper_iwmmxt_addcl helper_iwmmxt_addcl_sparc #define helper_iwmmxt_addcw helper_iwmmxt_addcw_sparc @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_sparc #define tcg_gen_gvec_2 tcg_gen_gvec_2_sparc #define tcg_gen_gvec_2i tcg_gen_gvec_2i_sparc +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_sparc +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_sparc #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_sparc #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_sparc #define tcg_gen_gvec_3 tcg_gen_gvec_3_sparc @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_sparc #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_sparc #define tcg_gen_gvec_add tcg_gen_gvec_add_sparc +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_sparc +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_sparc +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_sparc +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_sparc +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_sparc +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_sparc #define tcg_gen_gvec_and tcg_gen_gvec_and_sparc #define tcg_gen_gvec_andc tcg_gen_gvec_andc_sparc +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_sparc +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_sparc #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_sparc #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_sparc #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_sparc @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_sparc #define tcg_gen_gvec_mov tcg_gen_gvec_mov_sparc #define tcg_gen_gvec_mul tcg_gen_gvec_mul_sparc +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_sparc +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_sparc +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_sparc +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_sparc +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_sparc +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_sparc #define tcg_gen_gvec_neg tcg_gen_gvec_neg_sparc #define tcg_gen_gvec_not tcg_gen_gvec_not_sparc #define tcg_gen_gvec_or tcg_gen_gvec_or_sparc #define tcg_gen_gvec_orc tcg_gen_gvec_orc_sparc +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_sparc +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_sparc #define tcg_gen_gvec_sari tcg_gen_gvec_sari_sparc #define tcg_gen_gvec_shli tcg_gen_gvec_shli_sparc #define tcg_gen_gvec_shri tcg_gen_gvec_shri_sparc #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_sparc #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_sparc #define tcg_gen_gvec_sub tcg_gen_gvec_sub_sparc +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_sparc +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_sparc +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_sparc +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_sparc +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_sparc #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_sparc #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_sparc #define tcg_gen_gvec_xor tcg_gen_gvec_xor_sparc +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_sparc +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_sparc #define tcg_gen_insn_start tcg_gen_insn_start_sparc #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_sparc #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_sparc diff --git a/qemu/sparc64.h b/qemu/sparc64.h index e7bd4e47..50c9fa49 100644 --- a/qemu/sparc64.h +++ b/qemu/sparc64.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_sparc64 #define helper_gvec_add32 helper_gvec_add32_sparc64 #define helper_gvec_add64 helper_gvec_add64_sparc64 +#define helper_gvec_adds8 helper_gvec_adds8_sparc64 +#define helper_gvec_adds16 helper_gvec_adds16_sparc64 +#define helper_gvec_adds32 helper_gvec_adds32_sparc64 +#define helper_gvec_adds64 helper_gvec_adds64_sparc64 #define helper_gvec_and helper_gvec_and_sparc64 #define helper_gvec_andc helper_gvec_andc_sparc64 +#define helper_gvec_ands helper_gvec_ands_sparc64 #define helper_gvec_dup8 helper_gvec_dup8_sparc64 #define helper_gvec_dup16 helper_gvec_dup16_sparc64 #define helper_gvec_dup32 helper_gvec_dup32_sparc64 @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_sparc64 #define helper_gvec_mul32 helper_gvec_mul32_sparc64 #define helper_gvec_mul64 helper_gvec_mul64_sparc64 +#define helper_gvec_muls8 helper_gvec_muls8_sparc64 +#define helper_gvec_muls16 helper_gvec_muls16_sparc64 +#define helper_gvec_muls32 helper_gvec_muls32_sparc64 +#define helper_gvec_muls64 helper_gvec_muls64_sparc64 #define helper_gvec_ne8 helper_gvec_ne8_sparc64 #define helper_gvec_ne16 helper_gvec_ne16_sparc64 #define helper_gvec_ne32 helper_gvec_ne32_sparc64 @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_sparc64 #define helper_gvec_or helper_gvec_or_sparc64 #define helper_gvec_orc helper_gvec_orc_sparc64 +#define helper_gvec_ors helper_gvec_ors_sparc64 #define helper_gvec_sar8i helper_gvec_sar8i_sparc64 #define helper_gvec_sar16i helper_gvec_sar16i_sparc64 #define helper_gvec_sar32i helper_gvec_sar32i_sparc64 @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_sparc64 #define helper_gvec_sub32 helper_gvec_sub32_sparc64 #define helper_gvec_sub64 helper_gvec_sub64_sparc64 +#define helper_gvec_subs8 helper_gvec_subs8_sparc64 +#define helper_gvec_subs16 helper_gvec_subs16_sparc64 +#define helper_gvec_subs32 helper_gvec_subs32_sparc64 +#define helper_gvec_subs64 helper_gvec_subs64_sparc64 #define helper_gvec_ssadd8 helper_gvec_ssadd8_sparc64 #define helper_gvec_ssadd16 helper_gvec_ssadd16_sparc64 #define helper_gvec_ssadd32 helper_gvec_ssadd32_sparc64 @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_sparc64 #define helper_gvec_ussub64 helper_gvec_ussub64_sparc64 #define helper_gvec_xor helper_gvec_xor_sparc64 +#define helper_gvec_xors helper_gvec_xors_sparc64 #define helper_iwmmxt_addcb helper_iwmmxt_addcb_sparc64 #define helper_iwmmxt_addcl helper_iwmmxt_addcl_sparc64 #define helper_iwmmxt_addcw helper_iwmmxt_addcw_sparc64 @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_sparc64 #define tcg_gen_gvec_2 tcg_gen_gvec_2_sparc64 #define tcg_gen_gvec_2i tcg_gen_gvec_2i_sparc64 +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_sparc64 +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_sparc64 #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_sparc64 #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_sparc64 #define tcg_gen_gvec_3 tcg_gen_gvec_3_sparc64 @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_sparc64 #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_sparc64 #define tcg_gen_gvec_add tcg_gen_gvec_add_sparc64 +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_sparc64 +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_sparc64 +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_sparc64 +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_sparc64 +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_sparc64 +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_sparc64 #define tcg_gen_gvec_and tcg_gen_gvec_and_sparc64 #define tcg_gen_gvec_andc tcg_gen_gvec_andc_sparc64 +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_sparc64 +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_sparc64 #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_sparc64 #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_sparc64 #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_sparc64 @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_sparc64 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_sparc64 #define tcg_gen_gvec_mul tcg_gen_gvec_mul_sparc64 +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_sparc64 +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_sparc64 +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_sparc64 +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_sparc64 +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_sparc64 +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_sparc64 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_sparc64 #define tcg_gen_gvec_not tcg_gen_gvec_not_sparc64 #define tcg_gen_gvec_or tcg_gen_gvec_or_sparc64 #define tcg_gen_gvec_orc tcg_gen_gvec_orc_sparc64 +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_sparc64 +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_sparc64 #define tcg_gen_gvec_sari tcg_gen_gvec_sari_sparc64 #define tcg_gen_gvec_shli tcg_gen_gvec_shli_sparc64 #define tcg_gen_gvec_shri tcg_gen_gvec_shri_sparc64 #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_sparc64 #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_sparc64 #define tcg_gen_gvec_sub tcg_gen_gvec_sub_sparc64 +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_sparc64 +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_sparc64 +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_sparc64 +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_sparc64 +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_sparc64 #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_sparc64 #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_sparc64 #define tcg_gen_gvec_xor tcg_gen_gvec_xor_sparc64 +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_sparc64 +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_sparc64 #define tcg_gen_insn_start tcg_gen_insn_start_sparc64 #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_sparc64 #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_sparc64 diff --git a/qemu/tcg-runtime-gvec.c b/qemu/tcg-runtime-gvec.c index e6f99bab..8bf8d639 100644 --- a/qemu/tcg-runtime-gvec.c +++ b/qemu/tcg-runtime-gvec.c @@ -122,6 +122,54 @@ void HELPER(gvec_add64)(void *d, void *a, void *b, uint32_t desc) clear_high(d, oprsz, desc); } +void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec8 vecb = (vec8)DUP16(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec8)) { + *(vec8 *)(d + i) = *(vec8 *)(a + i) + vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec16 vecb = (vec16)DUP8(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec16)) { + *(vec16 *)(d + i) = *(vec16 *)(a + i) + vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec32 vecb = (vec32)DUP4(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec32)) { + *(vec32 *)(d + i) = *(vec32 *)(a + i) + vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_adds64)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec64 vecb = (vec64)DUP2(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec64)) { + *(vec64 *)(d + i) = *(vec64 *)(a + i) + vecb; + } + clear_high(d, oprsz, desc); +} + void HELPER(gvec_sub8)(void *d, void *a, void *b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); @@ -166,6 +214,54 @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc) clear_high(d, oprsz, desc); } +void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec8 vecb = (vec8)DUP16(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec8)) { + *(vec8 *)(d + i) = *(vec8 *)(a + i) - vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec16 vecb = (vec16)DUP8(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec16)) { + *(vec16 *)(d + i) = *(vec16 *)(a + i) - vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec32 vecb = (vec32)DUP4(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec32)) { + *(vec32 *)(d + i) = *(vec32 *)(a + i) - vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_subs64)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec64 vecb = (vec64)DUP2(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec64)) { + *(vec64 *)(d + i) = *(vec64 *)(a + i) - vecb; + } + clear_high(d, oprsz, desc); +} + void HELPER(gvec_mul8)(void *d, void *a, void *b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); @@ -210,6 +306,54 @@ void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc) clear_high(d, oprsz, desc); } +void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec8 vecb = (vec8)DUP16(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec8)) { + *(vec8 *)(d + i) = *(vec8 *)(a + i) * vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec16 vecb = (vec16)DUP8(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec16)) { + *(vec16 *)(d + i) = *(vec16 *)(a + i) * vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec32 vecb = (vec32)DUP4(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec32)) { + *(vec32 *)(d + i) = *(vec32 *)(a + i) * vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_muls64)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec64 vecb = (vec64)DUP2(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec64)) { + *(vec64 *)(d + i) = *(vec64 *)(a + i) * vecb; + } + clear_high(d, oprsz, desc); +} + void HELPER(gvec_neg8)(void *d, void *a, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); @@ -368,6 +512,42 @@ void HELPER(gvec_orc)(void *d, void *a, void *b, uint32_t desc) clear_high(d, oprsz, desc); } +void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec64 vecb = (vec64)DUP2(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec64)) { + *(vec64 *)(d + i) = *(vec64 *)(a + i) & vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec64 vecb = (vec64)DUP2(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec64)) { + *(vec64 *)(d + i) = *(vec64 *)(a + i) ^ vecb; + } + clear_high(d, oprsz, desc); +} + +void HELPER(gvec_ors)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + vec64 vecb = (vec64)DUP2(b); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(vec64)) { + *(vec64 *)(d + i) = *(vec64 *)(a + i) | vecb; + } + clear_high(d, oprsz, desc); +} + void HELPER(gvec_shl8i)(void *d, void *a, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); diff --git a/qemu/tcg/tcg-op-gvec.c b/qemu/tcg/tcg-op-gvec.c index 6bded9a8..ef72f2c6 100644 --- a/qemu/tcg/tcg-op-gvec.c +++ b/qemu/tcg/tcg-op-gvec.c @@ -104,6 +104,28 @@ void tcg_gen_gvec_2_ool(TCGContext *s, uint32_t dofs, uint32_t aofs, tcg_temp_free_i32(s, desc); } +/* Generate a call to a gvec-style helper with two vector operands + and one scalar operand. */ +void tcg_gen_gvec_2i_ool(TCGContext *s, uint32_t dofs, uint32_t aofs, TCGv_i64 c, + uint32_t oprsz, uint32_t maxsz, int32_t data, + gen_helper_gvec_2i *fn) +{ + TCGv_ptr a0, a1; + TCGv_i32 desc = tcg_const_i32(s, simd_desc(oprsz, maxsz, data)); + + a0 = tcg_temp_new_ptr(s); + a1 = tcg_temp_new_ptr(s); + + tcg_gen_addi_ptr(s, a0, s->cpu_env, dofs); + tcg_gen_addi_ptr(s, a1, s->cpu_env, aofs); + + fn(s, a0, a1, c, desc); + + tcg_temp_free_ptr(s, a0); + tcg_temp_free_ptr(s, a1); + tcg_temp_free_i32(s, desc); +} + /* Generate a call to a gvec-style helper with three vector operands. */ void tcg_gen_gvec_3_ool(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t oprsz, uint32_t maxsz, int32_t data, @@ -555,6 +577,27 @@ static void expand_2i_i32(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t tcg_temp_free_i32(s, t1); } +static void expand_2s_i32(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t oprsz, + TCGv_i32 c, bool scalar_first, + void (*fni)(TCGContext *s, TCGv_i32, TCGv_i32, TCGv_i32)) +{ + TCGv_i32 t0 = tcg_temp_new_i32(s); + TCGv_i32 t1 = tcg_temp_new_i32(s); + uint32_t i; + + for (i = 0; i < oprsz; i += 4) { + tcg_gen_ld_i32(s, t0, s->cpu_env, aofs + i); + if (scalar_first) { + fni(s, t1, c, t0); + } else { + fni(s, t1, t0, c); + } + tcg_gen_st_i32(s, t1, s->cpu_env, dofs + i); + } + tcg_temp_free_i32(s, t0); + tcg_temp_free_i32(s, t1); +} + /* Expand OPSZ bytes worth of three-operand operations using i32 elements. */ static void expand_3_i32(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t oprsz, bool load_dest, @@ -638,6 +681,27 @@ static void expand_2i_i64(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t tcg_temp_free_i64(s, t1); } +static void expand_2s_i64(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t oprsz, + TCGv_i64 c, bool scalar_first, + void (*fni)(TCGContext *s, TCGv_i64, TCGv_i64, TCGv_i64)) +{ + TCGv_i64 t0 = tcg_temp_new_i64(s); + TCGv_i64 t1 = tcg_temp_new_i64(s); + uint32_t i; + + for (i = 0; i < oprsz; i += 8) { + tcg_gen_ld_i64(s, t0, s->cpu_env, aofs + i); + if (scalar_first) { + fni(s, t1, c, t0); + } else { + fni(s, t1, t0, c); + } + tcg_gen_st_i64(s, t1, s->cpu_env, dofs + i); + } + tcg_temp_free_i64(s, t0); + tcg_temp_free_i64(s, t1); +} + /* Expand OPSZ bytes worth of three-operand operations using i64 elements. */ static void expand_3_i64(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t oprsz, bool load_dest, @@ -725,6 +789,27 @@ static void expand_2i_vec(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t tcg_temp_free_vec(s, t1); } +static void expand_2s_vec(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + uint32_t oprsz, uint32_t tysz, TCGType type, + TCGv_vec c, bool scalar_first, + void (*fni)(TCGContext *s, unsigned, TCGv_vec, TCGv_vec, TCGv_vec)) +{ + TCGv_vec t0 = tcg_temp_new_vec(s, type); + TCGv_vec t1 = tcg_temp_new_vec(s, type); + uint32_t i; + + for (i = 0; i < oprsz; i += tysz) { + tcg_gen_ld_vec(s, t0, s->cpu_env, aofs + i); + if (scalar_first) { + fni(s, vece, t1, c, t0); + } else { + fni(s, vece, t1, t0, c); + } + tcg_gen_st_vec(s, t1, s->cpu_env, dofs + i); + } + tcg_temp_free_vec(s, t0); + tcg_temp_free_vec(s, t1); +} /* Expand OPSZ bytes worth of three-operand operations using host vectors. */ static void expand_3_vec(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, @@ -829,6 +914,7 @@ void tcg_gen_gvec_2(TCGContext *s, uint32_t dofs, uint32_t aofs, } } +/* Expand a vector operation with two vectors and an immediate. */ void tcg_gen_gvec_2i(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t oprsz, uint32_t maxsz, int64_t c, const GVecGen2i *g) { @@ -868,7 +954,13 @@ void tcg_gen_gvec_2i(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t oprsz } else if (g->fni4 && check_size_impl(oprsz, 4)) { expand_2i_i32(s, dofs, aofs, oprsz, c, g->load_dest, g->fni4); } else { - tcg_gen_gvec_2_ool(s, dofs, aofs, oprsz, maxsz, c, g->fno); + if (g->fno) { + tcg_gen_gvec_2_ool(s, dofs, aofs, oprsz, maxsz, c, g->fno); + } else { + TCGv_i64 tcg_c = tcg_const_i64(s, c); + tcg_gen_gvec_2i_ool(s, dofs, aofs, tcg_c, oprsz, maxsz, c, g->fnoi); + tcg_temp_free_i64(s, tcg_c); + } return; } @@ -878,6 +970,87 @@ void tcg_gen_gvec_2i(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t oprsz } } +/* Expand a vector operation with two vectors and a scalar. */ +void tcg_gen_gvec_2s(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t oprsz, + uint32_t maxsz, TCGv_i64 c, const GVecGen2s *g) +{ + TCGType type; + + check_size_align(oprsz, maxsz, dofs | aofs); + check_overlap_2(dofs, aofs, maxsz); + + type = 0; + if (g->fniv) { + if (TCG_TARGET_HAS_v256 && check_size_impl(oprsz, 32)) { + type = TCG_TYPE_V256; + } else if (TCG_TARGET_HAS_v128 && check_size_impl(oprsz, 16)) { + type = TCG_TYPE_V128; + } else if (TCG_TARGET_HAS_v64 && !g->prefer_i64 + && check_size_impl(oprsz, 8)) { + type = TCG_TYPE_V64; + } + } + if (type != 0) { + TCGv_vec t_vec = tcg_temp_new_vec(s, type); + + tcg_gen_dup_i64_vec(s, g->vece, t_vec, c); + + /* Recall that ARM SVE allows vector sizes that are not a power of 2. + Expand with successively smaller host vector sizes. The intent is + that e.g. oprsz == 80 would be expanded with 2x32 + 1x16. */ + switch (type) { + case TCG_TYPE_V256: + { + uint32_t some = QEMU_ALIGN_DOWN(oprsz, 32); + expand_2s_vec(s, g->vece, dofs, aofs, some, 32, TCG_TYPE_V256, + t_vec, g->scalar_first, g->fniv); + if (some == oprsz) { + break; + } + dofs += some; + aofs += some; + oprsz -= some; + maxsz -= some; + } + /* fallthru */ + + case TCG_TYPE_V128: + expand_2s_vec(s, g->vece, dofs, aofs, oprsz, 16, TCG_TYPE_V128, + t_vec, g->scalar_first, g->fniv); + break; + + case TCG_TYPE_V64: + expand_2s_vec(s, g->vece, dofs, aofs, oprsz, 8, TCG_TYPE_V64, + t_vec, g->scalar_first, g->fniv); + break; + + default: + g_assert_not_reached(); + } + tcg_temp_free_vec(s, t_vec); + } else if (g->fni8 && check_size_impl(oprsz, 8)) { + TCGv_i64 t64 = tcg_temp_new_i64(s); + + gen_dup_i64(s, g->vece, t64, c); + expand_2s_i64(s, dofs, aofs, oprsz, t64, g->scalar_first, g->fni8); + tcg_temp_free_i64(s, t64); + } else if (g->fni4 && check_size_impl(oprsz, 4)) { + TCGv_i32 t32 = tcg_temp_new_i32(s); + + tcg_gen_extrl_i64_i32(s, t32, c); + gen_dup_i32(s, g->vece, t32, t32); + expand_2s_i32(s, dofs, aofs, oprsz, t32, g->scalar_first, g->fni4); + tcg_temp_free_i32(s, t32); + } else { + tcg_gen_gvec_2i_ool(s, dofs, aofs, c, oprsz, maxsz, 0, g->fno); + return; + } + + if (oprsz < maxsz) { + expand_clr(s, dofs + oprsz, maxsz - oprsz); + } +} + /* Expand a vector three-operand operation. */ void tcg_gen_gvec_3(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t oprsz, uint32_t maxsz, const GVecGen3 *g) @@ -1202,6 +1375,76 @@ void tcg_gen_gvec_add(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g[vece]); } +void tcg_gen_gvec_adds(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz) +{ + static const GVecGen2s g[4] = { + { .fni8 = tcg_gen_vec_add8_i64, + .fniv = tcg_gen_add_vec, + .fno = gen_helper_gvec_adds8, + .opc = INDEX_op_add_vec, + .vece = MO_8 }, + { .fni8 = tcg_gen_vec_add16_i64, + .fniv = tcg_gen_add_vec, + .fno = gen_helper_gvec_adds16, + .opc = INDEX_op_add_vec, + .vece = MO_16 }, + { .fni4 = tcg_gen_add_i32, + .fniv = tcg_gen_add_vec, + .fno = gen_helper_gvec_adds32, + .opc = INDEX_op_add_vec, + .vece = MO_32 }, + { .fni8 = tcg_gen_add_i64, + .fniv = tcg_gen_add_vec, + .fno = gen_helper_gvec_adds64, + .opc = INDEX_op_add_vec, + .prefer_i64 = TCG_TARGET_REG_BITS == 64, + .vece = MO_64 }, + }; + + tcg_debug_assert(vece <= MO_64); + tcg_gen_gvec_2s(s, dofs, aofs, oprsz, maxsz, c, &g[vece]); +} + +void tcg_gen_gvec_addi(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + int64_t c, uint32_t oprsz, uint32_t maxsz) +{ + TCGv_i64 tmp = tcg_const_i64(s, c); + tcg_gen_gvec_adds(s, vece, dofs, aofs, tmp, oprsz, maxsz); + tcg_temp_free_i64(s, tmp); +} + +void tcg_gen_gvec_subs(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz) +{ + static const GVecGen2s g[4] = { + { .fni8 = tcg_gen_vec_sub8_i64, + .fniv = tcg_gen_sub_vec, + .fno = gen_helper_gvec_subs8, + .opc = INDEX_op_sub_vec, + .vece = MO_8 }, + { .fni8 = tcg_gen_vec_sub16_i64, + .fniv = tcg_gen_sub_vec, + .fno = gen_helper_gvec_subs16, + .opc = INDEX_op_sub_vec, + .vece = MO_16 }, + { .fni4 = tcg_gen_sub_i32, + .fniv = tcg_gen_sub_vec, + .fno = gen_helper_gvec_subs32, + .opc = INDEX_op_sub_vec, + .vece = MO_32 }, + { .fni8 = tcg_gen_sub_i64, + .fniv = tcg_gen_sub_vec, + .fno = gen_helper_gvec_subs64, + .opc = INDEX_op_sub_vec, + .prefer_i64 = TCG_TARGET_REG_BITS == 64, + .vece = MO_64 }, + }; + + tcg_debug_assert(vece <= MO_64); + tcg_gen_gvec_2s(s, dofs, aofs, oprsz, maxsz, c, &g[vece]); +} + /* Perform a vector subtraction using normal subtraction and a mask. Compare gen_addv_mask above. */ static void gen_subv_mask(TCGContext *s, TCGv_i64 d, TCGv_i64 a, TCGv_i64 b, TCGv_i64 m) @@ -1310,6 +1553,43 @@ void tcg_gen_gvec_mul(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g[vece]); } +void tcg_gen_gvec_muls(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz) +{ + static const GVecGen2s g[4] = { + { .fniv = tcg_gen_mul_vec, + .fno = gen_helper_gvec_muls8, + .opc = INDEX_op_mul_vec, + .vece = MO_8 }, + { .fniv = tcg_gen_mul_vec, + .fno = gen_helper_gvec_muls16, + .opc = INDEX_op_mul_vec, + .vece = MO_16 }, + { .fni4 = tcg_gen_mul_i32, + .fniv = tcg_gen_mul_vec, + .fno = gen_helper_gvec_muls32, + .opc = INDEX_op_mul_vec, + .vece = MO_32 }, + { .fni8 = tcg_gen_mul_i64, + .fniv = tcg_gen_mul_vec, + .fno = gen_helper_gvec_muls64, + .opc = INDEX_op_mul_vec, + .prefer_i64 = TCG_TARGET_REG_BITS == 64, + .vece = MO_64 }, + }; + + tcg_debug_assert(vece <= MO_64); + tcg_gen_gvec_2s(s, dofs, aofs, oprsz, maxsz, c, &g[vece]); +} + +void tcg_gen_gvec_muli(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + int64_t c, uint32_t oprsz, uint32_t maxsz) +{ + TCGv_i64 tmp = tcg_const_i64(s, c); + tcg_gen_gvec_muls(s, vece, dofs, aofs, tmp, oprsz, maxsz); + tcg_temp_free_i64(s, tmp); +} + void tcg_gen_gvec_ssadd(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t oprsz, uint32_t maxsz) { @@ -1542,6 +1822,84 @@ void tcg_gen_gvec_orc(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g); } +static const GVecGen2s gop_ands = { + .fni8 = tcg_gen_and_i64, + .fniv = tcg_gen_and_vec, + .fno = gen_helper_gvec_ands, + .opc = INDEX_op_and_vec, + .prefer_i64 = TCG_TARGET_REG_BITS == 64, + .vece = MO_64 +}; + +void tcg_gen_gvec_ands(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz) +{ + TCGv_i64 tmp = tcg_temp_new_i64(s); + gen_dup_i64(s, vece, tmp, c); + tcg_gen_gvec_2s(s, dofs, aofs, oprsz, maxsz, tmp, &gop_ands); + tcg_temp_free_i64(s, tmp); +} + +void tcg_gen_gvec_andi(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + int64_t c, uint32_t oprsz, uint32_t maxsz) +{ + TCGv_i64 tmp = tcg_const_i64(s, dup_const(vece, c)); + tcg_gen_gvec_2s(s, dofs, aofs, oprsz, maxsz, tmp, &gop_ands); + tcg_temp_free_i64(s, tmp); +} + +static const GVecGen2s gop_xors = { + .fni8 = tcg_gen_xor_i64, + .fniv = tcg_gen_xor_vec, + .fno = gen_helper_gvec_xors, + .opc = INDEX_op_xor_vec, + .prefer_i64 = TCG_TARGET_REG_BITS == 64, + .vece = MO_64 +}; + +void tcg_gen_gvec_xors(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz) +{ + TCGv_i64 tmp = tcg_temp_new_i64(s); + gen_dup_i64(s, vece, tmp, c); + tcg_gen_gvec_2s(s, dofs, aofs, oprsz, maxsz, tmp, &gop_xors); + tcg_temp_free_i64(s, tmp); +} + +void tcg_gen_gvec_xori(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + int64_t c, uint32_t oprsz, uint32_t maxsz) +{ + TCGv_i64 tmp = tcg_const_i64(s, dup_const(vece, c)); + tcg_gen_gvec_2s(s, dofs, aofs, oprsz, maxsz, tmp, &gop_xors); + tcg_temp_free_i64(s, tmp); +} + +static const GVecGen2s gop_ors = { + .fni8 = tcg_gen_or_i64, + .fniv = tcg_gen_or_vec, + .fno = gen_helper_gvec_ors, + .opc = INDEX_op_or_vec, + .prefer_i64 = TCG_TARGET_REG_BITS == 64, + .vece = MO_64 +}; + +void tcg_gen_gvec_ors(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz) +{ + TCGv_i64 tmp = tcg_temp_new_i64(s); + gen_dup_i64(s, vece, tmp, c); + tcg_gen_gvec_2s(s, dofs, aofs, oprsz, maxsz, tmp, &gop_ors); + tcg_temp_free_i64(s, tmp); +} + +void tcg_gen_gvec_ori(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + int64_t c, uint32_t oprsz, uint32_t maxsz) +{ + TCGv_i64 tmp = tcg_const_i64(s, dup_const(vece, c)); + tcg_gen_gvec_2s(s, dofs, aofs, oprsz, maxsz, tmp, &gop_ors); + tcg_temp_free_i64(s, tmp); +} + void tcg_gen_vec_shl8i_i64(TCGContext *s, TCGv_i64 d, TCGv_i64 a, int64_t c) { uint64_t mask = dup_const(MO_8, 0xff << c); diff --git a/qemu/tcg/tcg-op-gvec.h b/qemu/tcg/tcg-op-gvec.h index 8a34bdcd..8fd3c28d 100644 --- a/qemu/tcg/tcg-op-gvec.h +++ b/qemu/tcg/tcg-op-gvec.h @@ -30,44 +30,50 @@ /* Expand a call to a gvec-style helper, with pointers to two vector operands, and a descriptor (see tcg-gvec-desc.h). */ -typedef void gen_helper_gvec_2(TCGContext *s, TCGv_ptr, TCGv_ptr, TCGv_i32); +typedef void gen_helper_gvec_2(TCGContext *, TCGv_ptr, TCGv_ptr, TCGv_i32); void tcg_gen_gvec_2_ool(TCGContext *, uint32_t dofs, uint32_t aofs, uint32_t oprsz, uint32_t maxsz, int32_t data, gen_helper_gvec_2 *fn); +/* Similarly, passing an extra data value. */ +typedef void gen_helper_gvec_2i(TCGContext *, TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv_i32); +void tcg_gen_gvec_2i_ool(TCGContext *s, uint32_t dofs, uint32_t aofs, TCGv_i64 c, + uint32_t oprsz, uint32_t maxsz, int32_t data, + gen_helper_gvec_2i *fn); + /* Similarly, passing an extra pointer (e.g. env or float_status). */ -typedef void gen_helper_gvec_2_ptr(TCGContext *s, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); +typedef void gen_helper_gvec_2_ptr(TCGContext *, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); void tcg_gen_gvec_2_ptr(TCGContext *, uint32_t dofs, uint32_t aofs, TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz, int32_t data, gen_helper_gvec_2_ptr *fn); /* Similarly, with three vector operands. */ -typedef void gen_helper_gvec_3(TCGContext *s, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); +typedef void gen_helper_gvec_3(TCGContext *, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); void tcg_gen_gvec_3_ool(TCGContext *, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t oprsz, uint32_t maxsz, int32_t data, gen_helper_gvec_3 *fn); /* Similarly, with four vector operands. */ -typedef void gen_helper_gvec_4(TCGContext *s, TCGv_ptr, TCGv_ptr, TCGv_ptr, +typedef void gen_helper_gvec_4(TCGContext *, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); void tcg_gen_gvec_4_ool(TCGContext *, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs, uint32_t oprsz, uint32_t maxsz, int32_t data, gen_helper_gvec_4 *fn); /* Similarly, with five vector operands. */ -typedef void gen_helper_gvec_5(TCGContext *s, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, +typedef void gen_helper_gvec_5(TCGContext *, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); void tcg_gen_gvec_5_ool(TCGContext *, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs, uint32_t xofs, uint32_t oprsz, uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn); -typedef void gen_helper_gvec_3_ptr(TCGContext *s, TCGv_ptr, TCGv_ptr, TCGv_ptr, +typedef void gen_helper_gvec_3_ptr(TCGContext *, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); void tcg_gen_gvec_3_ptr(TCGContext *, uint32_t dofs, uint32_t aofs, uint32_t bofs, TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz, int32_t data, gen_helper_gvec_3_ptr *fn); -typedef void gen_helper_gvec_4_ptr(TCGContext *s, TCGv_ptr, TCGv_ptr, TCGv_ptr, +typedef void gen_helper_gvec_4_ptr(TCGContext *, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); void tcg_gen_gvec_4_ptr(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs, TCGv_ptr ptr, uint32_t oprsz, @@ -76,25 +82,6 @@ void tcg_gen_gvec_4_ptr(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bo /* Expand a gvec operation. Either inline or out-of-line depending on the actual vector size and the operations supported by the host. */ -typedef struct { - /* Expand inline as a 64-bit or 32-bit integer. - Only one of these will be non-NULL. */ - void (*fni8)(TCGContext *, TCGv_i64, TCGv_i64, int64_t); - void (*fni4)(TCGContext *, TCGv_i32, TCGv_i32, int32_t); - /* Expand inline with a host vector type. */ - void (*fniv)(TCGContext *, unsigned, TCGv_vec, TCGv_vec, int64_t); - /* Expand out-of-line helper w/descriptor. */ - gen_helper_gvec_2 *fno; - /* The opcode, if any, to which this corresponds. */ - TCGOpcode opc; - /* The vector element size, if applicable. */ - uint8_t vece; - /* Prefer i64 to v64. */ - bool prefer_i64; - /* Load dest as a 3rd source operand. */ - bool load_dest; -} GVecGen2i; - typedef struct { /* Expand inline as a 64-bit or 32-bit integer. Only one of these will be non-NULL. */ @@ -114,6 +101,48 @@ typedef struct { bool prefer_i64; } GVecGen2; +typedef struct { + /* Expand inline as a 64-bit or 32-bit integer. + Only one of these will be non-NULL. */ + void (*fni8)(TCGContext *, TCGv_i64, TCGv_i64, int64_t); + void (*fni4)(TCGContext *, TCGv_i32, TCGv_i32, int32_t); + /* Expand inline with a host vector type. */ + void (*fniv)(TCGContext *, unsigned, TCGv_vec, TCGv_vec, int64_t); + /* Expand out-of-line helper w/descriptor, data in descriptor. */ + gen_helper_gvec_2 *fno; + /* Expand out-of-line helper w/descriptor, data as argument. */ + gen_helper_gvec_2i *fnoi; + /* The opcode, if any, to which this corresponds. */ + TCGOpcode opc; + /* The vector element size, if applicable. */ + uint8_t vece; + /* Prefer i64 to v64. */ + bool prefer_i64; + /* Load dest as a 3rd source operand. */ + bool load_dest; +} GVecGen2i; + +typedef struct { + /* Expand inline as a 64-bit or 32-bit integer. + Only one of these will be non-NULL. */ + void (*fni8)(TCGContext *, TCGv_i64, TCGv_i64, TCGv_i64); + void (*fni4)(TCGContext *, TCGv_i32, TCGv_i32, TCGv_i32); + /* Expand inline with a host vector type. */ + void (*fniv)(TCGContext *, unsigned, TCGv_vec, TCGv_vec, TCGv_vec); + /* Expand out-of-line helper w/descriptor. */ + gen_helper_gvec_2i *fno; + /* The opcode, if any, to which this corresponds. */ + TCGOpcode opc; + /* The data argument to the out-of-line helper. */ + uint32_t data; + /* The vector element size, if applicable. */ + uint8_t vece; + /* Prefer i64 to v64. */ + bool prefer_i64; + /* Load scalar as 1st source operand. */ + bool scalar_first; +} GVecGen2s; + typedef struct { /* Expand inline as a 64-bit or 32-bit integer. Only one of these will be non-NULL. */ @@ -158,6 +187,8 @@ void tcg_gen_gvec_2(TCGContext *, uint32_t dofs, uint32_t aofs, uint32_t oprsz, uint32_t maxsz, const GVecGen2 *); void tcg_gen_gvec_2i(TCGContext *, uint32_t dofs, uint32_t aofs, uint32_t oprsz, uint32_t maxsz, int64_t c, const GVecGen2i *); +void tcg_gen_gvec_2s(TCGContext *, uint32_t dofs, uint32_t aofs, uint32_t oprsz, + uint32_t maxsz, TCGv_i64 c, const GVecGen2s *); void tcg_gen_gvec_3(TCGContext *, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t oprsz, uint32_t maxsz, const GVecGen3 *); void tcg_gen_gvec_4(TCGContext *, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs, @@ -179,6 +210,18 @@ void tcg_gen_gvec_sub(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs, void tcg_gen_gvec_mul(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_addi(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + int64_t c, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_muli(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + int64_t c, uint32_t oprsz, uint32_t maxsz); + +void tcg_gen_gvec_adds(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_subs(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_muls(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); + /* Saturated arithmetic. */ void tcg_gen_gvec_ssadd(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t oprsz, uint32_t maxsz); @@ -200,6 +243,20 @@ void tcg_gen_gvec_andc(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs void tcg_gen_gvec_orc(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_andi(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + int64_t c, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_xori(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + int64_t c, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_ori(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + int64_t c, uint32_t oprsz, uint32_t maxsz); + +void tcg_gen_gvec_ands(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_xors(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_ors(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); + void tcg_gen_gvec_dup_mem(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs, uint32_t s, uint32_t m); void tcg_gen_gvec_dup_i32(TCGContext *, unsigned vece, uint32_t dofs, uint32_t s, diff --git a/qemu/tcg/tcg-runtime.h b/qemu/tcg/tcg-runtime.h index 9c5768d4..3d249fef 100644 --- a/qemu/tcg/tcg-runtime.h +++ b/qemu/tcg/tcg-runtime.h @@ -148,16 +148,31 @@ DEF_HELPER_FLAGS_4(gvec_add16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_add32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_add64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(gvec_adds8, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_adds16, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_adds32, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_adds64, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) + DEF_HELPER_FLAGS_4(gvec_sub8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_sub16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_sub32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_sub64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(gvec_subs8, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_subs16, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_subs32, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_subs64, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) + DEF_HELPER_FLAGS_4(gvec_mul8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_mul16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_mul32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_mul64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(gvec_muls8, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_muls16, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_muls32, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_muls64, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) + DEF_HELPER_FLAGS_3(gvec_neg8, TCG_CALL_NO_RWG, void, ptr, ptr, i32) DEF_HELPER_FLAGS_3(gvec_neg16, TCG_CALL_NO_RWG, void, ptr, ptr, i32) DEF_HELPER_FLAGS_3(gvec_neg32, TCG_CALL_NO_RWG, void, ptr, ptr, i32) @@ -190,6 +205,10 @@ DEF_HELPER_FLAGS_4(gvec_xor, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_andc, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_orc, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(gvec_ands, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_xors, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_ors, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) + DEF_HELPER_FLAGS_3(gvec_shl8i, TCG_CALL_NO_RWG, void, ptr, ptr, i32) DEF_HELPER_FLAGS_3(gvec_shl16i, TCG_CALL_NO_RWG, void, ptr, ptr, i32) DEF_HELPER_FLAGS_3(gvec_shl32i, TCG_CALL_NO_RWG, void, ptr, ptr, i32) diff --git a/qemu/x86_64.h b/qemu/x86_64.h index 3e574f90..54794084 100644 --- a/qemu/x86_64.h +++ b/qemu/x86_64.h @@ -1613,8 +1613,13 @@ #define helper_gvec_add16 helper_gvec_add16_x86_64 #define helper_gvec_add32 helper_gvec_add32_x86_64 #define helper_gvec_add64 helper_gvec_add64_x86_64 +#define helper_gvec_adds8 helper_gvec_adds8_x86_64 +#define helper_gvec_adds16 helper_gvec_adds16_x86_64 +#define helper_gvec_adds32 helper_gvec_adds32_x86_64 +#define helper_gvec_adds64 helper_gvec_adds64_x86_64 #define helper_gvec_and helper_gvec_and_x86_64 #define helper_gvec_andc helper_gvec_andc_x86_64 +#define helper_gvec_ands helper_gvec_ands_x86_64 #define helper_gvec_dup8 helper_gvec_dup8_x86_64 #define helper_gvec_dup16 helper_gvec_dup16_x86_64 #define helper_gvec_dup32 helper_gvec_dup32_x86_64 @@ -1644,6 +1649,10 @@ #define helper_gvec_mul16 helper_gvec_mul16_x86_64 #define helper_gvec_mul32 helper_gvec_mul32_x86_64 #define helper_gvec_mul64 helper_gvec_mul64_x86_64 +#define helper_gvec_muls8 helper_gvec_muls8_x86_64 +#define helper_gvec_muls16 helper_gvec_muls16_x86_64 +#define helper_gvec_muls32 helper_gvec_muls32_x86_64 +#define helper_gvec_muls64 helper_gvec_muls64_x86_64 #define helper_gvec_ne8 helper_gvec_ne8_x86_64 #define helper_gvec_ne16 helper_gvec_ne16_x86_64 #define helper_gvec_ne32 helper_gvec_ne32_x86_64 @@ -1655,6 +1664,7 @@ #define helper_gvec_not helper_gvec_not_x86_64 #define helper_gvec_or helper_gvec_or_x86_64 #define helper_gvec_orc helper_gvec_orc_x86_64 +#define helper_gvec_ors helper_gvec_ors_x86_64 #define helper_gvec_sar8i helper_gvec_sar8i_x86_64 #define helper_gvec_sar16i helper_gvec_sar16i_x86_64 #define helper_gvec_sar32i helper_gvec_sar32i_x86_64 @@ -1671,6 +1681,10 @@ #define helper_gvec_sub16 helper_gvec_sub16_x86_64 #define helper_gvec_sub32 helper_gvec_sub32_x86_64 #define helper_gvec_sub64 helper_gvec_sub64_x86_64 +#define helper_gvec_subs8 helper_gvec_subs8_x86_64 +#define helper_gvec_subs16 helper_gvec_subs16_x86_64 +#define helper_gvec_subs32 helper_gvec_subs32_x86_64 +#define helper_gvec_subs64 helper_gvec_subs64_x86_64 #define helper_gvec_ssadd8 helper_gvec_ssadd8_x86_64 #define helper_gvec_ssadd16 helper_gvec_ssadd16_x86_64 #define helper_gvec_ssadd32 helper_gvec_ssadd32_x86_64 @@ -1688,6 +1702,7 @@ #define helper_gvec_ussub32 helper_gvec_ussub32_x86_64 #define helper_gvec_ussub64 helper_gvec_ussub64_x86_64 #define helper_gvec_xor helper_gvec_xor_x86_64 +#define helper_gvec_xors helper_gvec_xors_x86_64 #define helper_iwmmxt_addcb helper_iwmmxt_addcb_x86_64 #define helper_iwmmxt_addcl helper_iwmmxt_addcl_x86_64 #define helper_iwmmxt_addcw helper_iwmmxt_addcw_x86_64 @@ -3172,6 +3187,8 @@ #define tcg_gen_goto_tb tcg_gen_goto_tb_x86_64 #define tcg_gen_gvec_2 tcg_gen_gvec_2_x86_64 #define tcg_gen_gvec_2i tcg_gen_gvec_2i_x86_64 +#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_x86_64 +#define tcg_gen_gvec_2s tcg_gen_gvec_2s_x86_64 #define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_x86_64 #define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_x86_64 #define tcg_gen_gvec_3 tcg_gen_gvec_3_x86_64 @@ -3182,8 +3199,16 @@ #define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_x86_64 #define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_x86_64 #define tcg_gen_gvec_add tcg_gen_gvec_add_x86_64 +#define tcg_gen_gvec_addi tcg_gen_gvec_addi_x86_64 +#define tcg_gen_gvec_adds tcg_gen_gvec_adds_x86_64 +#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_x86_64 +#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_x86_64 +#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_x86_64 +#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_x86_64 #define tcg_gen_gvec_and tcg_gen_gvec_and_x86_64 #define tcg_gen_gvec_andc tcg_gen_gvec_andc_x86_64 +#define tcg_gen_gvec_andi tcg_gen_gvec_andi_x86_64 +#define tcg_gen_gvec_ands tcg_gen_gvec_ands_x86_64 #define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_x86_64 #define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_x86_64 #define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_x86_64 @@ -3194,19 +3219,34 @@ #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_x86_64 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_x86_64 #define tcg_gen_gvec_mul tcg_gen_gvec_mul_x86_64 +#define tcg_gen_gvec_muli tcg_gen_gvec_muli_x86_64 +#define tcg_gen_gvec_muls tcg_gen_gvec_muls_x86_64 +#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_x86_64 +#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_x86_64 +#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_x86_64 +#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_x86_64 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_x86_64 #define tcg_gen_gvec_not tcg_gen_gvec_not_x86_64 #define tcg_gen_gvec_or tcg_gen_gvec_or_x86_64 #define tcg_gen_gvec_orc tcg_gen_gvec_orc_x86_64 +#define tcg_gen_gvec_ori tcg_gen_gvec_ori_x86_64 +#define tcg_gen_gvec_ors tcg_gen_gvec_ors_x86_64 #define tcg_gen_gvec_sari tcg_gen_gvec_sari_x86_64 #define tcg_gen_gvec_shli tcg_gen_gvec_shli_x86_64 #define tcg_gen_gvec_shri tcg_gen_gvec_shri_x86_64 #define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_x86_64 #define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_x86_64 #define tcg_gen_gvec_sub tcg_gen_gvec_sub_x86_64 +#define tcg_gen_gvec_subs tcg_gen_gvec_subs_x86_64 +#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_x86_64 +#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_x86_64 +#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_x86_64 +#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_x86_64 #define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_x86_64 #define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_x86_64 #define tcg_gen_gvec_xor tcg_gen_gvec_xor_x86_64 +#define tcg_gen_gvec_xori tcg_gen_gvec_xori_x86_64 +#define tcg_gen_gvec_xors tcg_gen_gvec_xors_x86_64 #define tcg_gen_insn_start tcg_gen_insn_start_x86_64 #define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_x86_64 #define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_x86_64