From ade246e87b9a5803a96349b31c492519f581d951 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 15 Jun 2018 13:35:37 -0400 Subject: [PATCH] target/arm: Implement SVE Integer Compare - Immediate Group Backports commit 38cadeba0daf0f16cf2aeaa5b2752b26fb0676c5 from qemu --- qemu/aarch64.h | 40 +++++++++++++++ qemu/aarch64eb.h | 40 +++++++++++++++ qemu/header_gen.py | 40 +++++++++++++++ qemu/target/arm/helper-sve.h | 44 +++++++++++++++++ qemu/target/arm/sve.decode | 23 +++++++++ qemu/target/arm/sve_helper.c | 88 +++++++++++++++++++++++++++++++++ qemu/target/arm/translate-sve.c | 69 +++++++++++++++++++++++++- 7 files changed, 343 insertions(+), 1 deletion(-) diff --git a/qemu/aarch64.h b/qemu/aarch64.h index c5abc166..6c903817 100644 --- a/qemu/aarch64.h +++ b/qemu/aarch64.h @@ -3330,68 +3330,108 @@ #define helper_sve_clz_d helper_sve_clz_d_aarch64 #define helper_sve_clz_h helper_sve_clz_h_aarch64 #define helper_sve_clz_s helper_sve_clz_s_aarch64 +#define helper_sve_cmpeq_ppzi_b helper_sve_cmpeq_ppzi_b_aarch64 #define helper_sve_cmpeq_ppzw_b helper_sve_cmpeq_ppzw_b_aarch64 #define helper_sve_cmpeq_ppzz_b helper_sve_cmpeq_ppzz_b_aarch64 +#define helper_sve_cmpeq_ppzi_d helper_sve_cmpeq_ppzi_d_aarch64 #define helper_sve_cmpeq_ppzw_d helper_sve_cmpeq_ppzw_d_aarch64 #define helper_sve_cmpeq_ppzz_d helper_sve_cmpeq_ppzz_d_aarch64 +#define helper_sve_cmpeq_ppzi_h helper_sve_cmpeq_ppzi_h_aarch64 #define helper_sve_cmpeq_ppzw_h helper_sve_cmpeq_ppzw_h_aarch64 #define helper_sve_cmpeq_ppzz_h helper_sve_cmpeq_ppzz_h_aarch64 +#define helper_sve_cmpeq_ppzi_s helper_sve_cmpeq_ppzi_s_aarch64 #define helper_sve_cmpeq_ppzw_s helper_sve_cmpeq_ppzw_s_aarch64 #define helper_sve_cmpeq_ppzz_s helper_sve_cmpeq_ppzz_s_aarch64 +#define helper_sve_cmpge_ppzi_b helper_sve_cmpge_ppzi_b_aarch64 #define helper_sve_cmpge_ppzw_b helper_sve_cmpge_ppzw_b_aarch64 #define helper_sve_cmpge_ppzz_b helper_sve_cmpge_ppzz_b_aarch64 +#define helper_sve_cmpge_ppzi_d helper_sve_cmpge_ppzi_d_aarch64 #define helper_sve_cmpge_ppzw_d helper_sve_cmpge_ppzw_d_aarch64 #define helper_sve_cmpge_ppzz_d helper_sve_cmpge_ppzz_d_aarch64 +#define helper_sve_cmpge_ppzi_h helper_sve_cmpge_ppzi_h_aarch64 #define helper_sve_cmpge_ppzw_h helper_sve_cmpge_ppzw_h_aarch64 #define helper_sve_cmpge_ppzz_h helper_sve_cmpge_ppzz_h_aarch64 +#define helper_sve_cmpge_ppzi_s helper_sve_cmpge_ppzi_s_aarch64 #define helper_sve_cmpge_ppzw_s helper_sve_cmpge_ppzw_s_aarch64 #define helper_sve_cmpge_ppzz_s helper_sve_cmpge_ppzz_s_aarch64 +#define helper_sve_cmpgt_ppzi_b helper_sve_cmpgt_ppzi_b_aarch64 #define helper_sve_cmpgt_ppzw_b helper_sve_cmpgt_ppzw_b_aarch64 #define helper_sve_cmpgt_ppzz_b helper_sve_cmpgt_ppzz_b_aarch64 +#define helper_sve_cmpgt_ppzi_d helper_sve_cmpgt_ppzi_d_aarch64 #define helper_sve_cmpgt_ppzw_d helper_sve_cmpgt_ppzw_d_aarch64 #define helper_sve_cmpgt_ppzz_d helper_sve_cmpgt_ppzz_d_aarch64 +#define helper_sve_cmpgt_ppzi_h helper_sve_cmpgt_ppzi_h_aarch64 #define helper_sve_cmpgt_ppzw_h helper_sve_cmpgt_ppzw_h_aarch64 #define helper_sve_cmpgt_ppzz_h helper_sve_cmpgt_ppzz_h_aarch64 +#define helper_sve_cmpgt_ppzi_s helper_sve_cmpgt_ppzi_s_aarch64 #define helper_sve_cmpgt_ppzw_s helper_sve_cmpgt_ppzw_s_aarch64 #define helper_sve_cmpgt_ppzz_s helper_sve_cmpgt_ppzz_s_aarch64 +#define helper_sve_cmphi_ppzi_b helper_sve_cmphi_ppzi_b_aarch64 #define helper_sve_cmphi_ppzw_b helper_sve_cmphi_ppzw_b_aarch64 #define helper_sve_cmphi_ppzz_b helper_sve_cmphi_ppzz_b_aarch64 +#define helper_sve_cmphi_ppzi_d helper_sve_cmphi_ppzi_d_aarch64 #define helper_sve_cmphi_ppzw_d helper_sve_cmphi_ppzw_d_aarch64 #define helper_sve_cmphi_ppzz_d helper_sve_cmphi_ppzz_d_aarch64 +#define helper_sve_cmphi_ppzi_h helper_sve_cmphi_ppzi_h_aarch64 #define helper_sve_cmphi_ppzw_h helper_sve_cmphi_ppzw_h_aarch64 #define helper_sve_cmphi_ppzz_h helper_sve_cmphi_ppzz_h_aarch64 +#define helper_sve_cmphi_ppzi_s helper_sve_cmphi_ppzi_s_aarch64 #define helper_sve_cmphi_ppzw_s helper_sve_cmphi_ppzw_s_aarch64 #define helper_sve_cmphi_ppzz_s helper_sve_cmphi_ppzz_s_aarch64 +#define helper_sve_cmphs_ppzi_b helper_sve_cmphs_ppzi_b_aarch64 #define helper_sve_cmphs_ppzw_b helper_sve_cmphs_ppzw_b_aarch64 #define helper_sve_cmphs_ppzz_b helper_sve_cmphs_ppzz_b_aarch64 +#define helper_sve_cmphs_ppzi_d helper_sve_cmphs_ppzi_d_aarch64 #define helper_sve_cmphs_ppzw_d helper_sve_cmphs_ppzw_d_aarch64 #define helper_sve_cmphs_ppzz_d helper_sve_cmphs_ppzz_d_aarch64 +#define helper_sve_cmphs_ppzi_h helper_sve_cmphs_ppzi_h_aarch64 #define helper_sve_cmphs_ppzw_h helper_sve_cmphs_ppzw_h_aarch64 #define helper_sve_cmphs_ppzz_h helper_sve_cmphs_ppzz_h_aarch64 +#define helper_sve_cmphs_ppzi_s helper_sve_cmphs_ppzi_s_aarch64 #define helper_sve_cmphs_ppzw_s helper_sve_cmphs_ppzw_s_aarch64 #define helper_sve_cmphs_ppzz_s helper_sve_cmphs_ppzz_s_aarch64 +#define helper_sve_cmple_ppzi_b helper_sve_cmple_ppzi_b_aarch64 #define helper_sve_cmple_ppzw_b helper_sve_cmple_ppzw_b_aarch64 +#define helper_sve_cmple_ppzi_d helper_sve_cmple_ppzi_d_aarch64 #define helper_sve_cmple_ppzw_d helper_sve_cmple_ppzw_d_aarch64 +#define helper_sve_cmple_ppzi_h helper_sve_cmple_ppzi_h_aarch64 #define helper_sve_cmple_ppzw_h helper_sve_cmple_ppzw_h_aarch64 +#define helper_sve_cmple_ppzi_s helper_sve_cmple_ppzi_s_aarch64 #define helper_sve_cmple_ppzw_s helper_sve_cmple_ppzw_s_aarch64 +#define helper_sve_cmplo_ppzi_b helper_sve_cmplo_ppzi_b_aarch64 #define helper_sve_cmplo_ppzw_b helper_sve_cmplo_ppzw_b_aarch64 +#define helper_sve_cmplo_ppzi_d helper_sve_cmplo_ppzi_d_aarch64 #define helper_sve_cmplo_ppzw_d helper_sve_cmplo_ppzw_d_aarch64 +#define helper_sve_cmplo_ppzi_h helper_sve_cmplo_ppzi_h_aarch64 #define helper_sve_cmplo_ppzw_h helper_sve_cmplo_ppzw_h_aarch64 +#define helper_sve_cmplo_ppzi_s helper_sve_cmplo_ppzi_s_aarch64 #define helper_sve_cmplo_ppzw_s helper_sve_cmplo_ppzw_s_aarch64 +#define helper_sve_cmpls_ppzi_b helper_sve_cmpls_ppzi_b_aarch64 #define helper_sve_cmpls_ppzw_b helper_sve_cmpls_ppzw_b_aarch64 +#define helper_sve_cmpls_ppzi_d helper_sve_cmpls_ppzi_d_aarch64 #define helper_sve_cmpls_ppzw_d helper_sve_cmpls_ppzw_d_aarch64 +#define helper_sve_cmpls_ppzi_h helper_sve_cmpls_ppzi_h_aarch64 #define helper_sve_cmpls_ppzw_h helper_sve_cmpls_ppzw_h_aarch64 +#define helper_sve_cmpls_ppzi_s helper_sve_cmpls_ppzi_s_aarch64 #define helper_sve_cmpls_ppzw_s helper_sve_cmpls_ppzw_s_aarch64 +#define helper_sve_cmplt_ppzi_b helper_sve_cmplt_ppzi_b_aarch64 #define helper_sve_cmplt_ppzw_b helper_sve_cmplt_ppzw_b_aarch64 +#define helper_sve_cmplt_ppzi_d helper_sve_cmplt_ppzi_d_aarch64 #define helper_sve_cmplt_ppzw_d helper_sve_cmplt_ppzw_d_aarch64 +#define helper_sve_cmplt_ppzi_h helper_sve_cmplt_ppzi_h_aarch64 #define helper_sve_cmplt_ppzw_h helper_sve_cmplt_ppzw_h_aarch64 +#define helper_sve_cmplt_ppzi_s helper_sve_cmplt_ppzi_s_aarch64 #define helper_sve_cmplt_ppzw_s helper_sve_cmplt_ppzw_s_aarch64 +#define helper_sve_cmpne_ppzi_b helper_sve_cmpne_ppzi_b_aarch64 #define helper_sve_cmpne_ppzw_b helper_sve_cmpne_ppzw_b_aarch64 #define helper_sve_cmpne_ppzz_b helper_sve_cmpne_ppzz_b_aarch64 +#define helper_sve_cmpne_ppzi_d helper_sve_cmpne_ppzi_d_aarch64 #define helper_sve_cmpne_ppzw_d helper_sve_cmpne_ppzw_d_aarch64 #define helper_sve_cmpne_ppzz_d helper_sve_cmpne_ppzz_d_aarch64 +#define helper_sve_cmpne_ppzi_h helper_sve_cmpne_ppzi_h_aarch64 #define helper_sve_cmpne_ppzw_h helper_sve_cmpne_ppzw_h_aarch64 #define helper_sve_cmpne_ppzz_h helper_sve_cmpne_ppzz_h_aarch64 +#define helper_sve_cmpne_ppzi_s helper_sve_cmpne_ppzi_s_aarch64 #define helper_sve_cmpne_ppzw_s helper_sve_cmpne_ppzw_s_aarch64 #define helper_sve_cmpne_ppzz_s helper_sve_cmpne_ppzz_s_aarch64 #define helper_sve_cnot_b helper_sve_cnot_b_aarch64 diff --git a/qemu/aarch64eb.h b/qemu/aarch64eb.h index 6bea8378..67100814 100644 --- a/qemu/aarch64eb.h +++ b/qemu/aarch64eb.h @@ -3330,68 +3330,108 @@ #define helper_sve_clz_d helper_sve_clz_d_aarch64eb #define helper_sve_clz_h helper_sve_clz_h_aarch64eb #define helper_sve_clz_s helper_sve_clz_s_aarch64eb +#define helper_sve_cmpeq_ppzi_b helper_sve_cmpeq_ppzi_b_aarch64eb #define helper_sve_cmpeq_ppzw_b helper_sve_cmpeq_ppzw_b_aarch64eb #define helper_sve_cmpeq_ppzz_b helper_sve_cmpeq_ppzz_b_aarch64eb +#define helper_sve_cmpeq_ppzi_d helper_sve_cmpeq_ppzi_d_aarch64eb #define helper_sve_cmpeq_ppzw_d helper_sve_cmpeq_ppzw_d_aarch64eb #define helper_sve_cmpeq_ppzz_d helper_sve_cmpeq_ppzz_d_aarch64eb +#define helper_sve_cmpeq_ppzi_h helper_sve_cmpeq_ppzi_h_aarch64eb #define helper_sve_cmpeq_ppzw_h helper_sve_cmpeq_ppzw_h_aarch64eb #define helper_sve_cmpeq_ppzz_h helper_sve_cmpeq_ppzz_h_aarch64eb +#define helper_sve_cmpeq_ppzi_s helper_sve_cmpeq_ppzi_s_aarch64eb #define helper_sve_cmpeq_ppzw_s helper_sve_cmpeq_ppzw_s_aarch64eb #define helper_sve_cmpeq_ppzz_s helper_sve_cmpeq_ppzz_s_aarch64eb +#define helper_sve_cmpge_ppzi_b helper_sve_cmpge_ppzi_b_aarch64eb #define helper_sve_cmpge_ppzw_b helper_sve_cmpge_ppzw_b_aarch64eb #define helper_sve_cmpge_ppzz_b helper_sve_cmpge_ppzz_b_aarch64eb +#define helper_sve_cmpge_ppzi_d helper_sve_cmpge_ppzi_d_aarch64eb #define helper_sve_cmpge_ppzw_d helper_sve_cmpge_ppzw_d_aarch64eb #define helper_sve_cmpge_ppzz_d helper_sve_cmpge_ppzz_d_aarch64eb +#define helper_sve_cmpge_ppzi_h helper_sve_cmpge_ppzi_h_aarch64eb #define helper_sve_cmpge_ppzw_h helper_sve_cmpge_ppzw_h_aarch64eb #define helper_sve_cmpge_ppzz_h helper_sve_cmpge_ppzz_h_aarch64eb +#define helper_sve_cmpge_ppzi_s helper_sve_cmpge_ppzi_s_aarch64eb #define helper_sve_cmpge_ppzw_s helper_sve_cmpge_ppzw_s_aarch64eb #define helper_sve_cmpge_ppzz_s helper_sve_cmpge_ppzz_s_aarch64eb +#define helper_sve_cmpgt_ppzi_b helper_sve_cmpgt_ppzi_b_aarch64eb #define helper_sve_cmpgt_ppzw_b helper_sve_cmpgt_ppzw_b_aarch64eb #define helper_sve_cmpgt_ppzz_b helper_sve_cmpgt_ppzz_b_aarch64eb +#define helper_sve_cmpgt_ppzi_d helper_sve_cmpgt_ppzi_d_aarch64eb #define helper_sve_cmpgt_ppzw_d helper_sve_cmpgt_ppzw_d_aarch64eb #define helper_sve_cmpgt_ppzz_d helper_sve_cmpgt_ppzz_d_aarch64eb +#define helper_sve_cmpgt_ppzi_h helper_sve_cmpgt_ppzi_h_aarch64eb #define helper_sve_cmpgt_ppzw_h helper_sve_cmpgt_ppzw_h_aarch64eb #define helper_sve_cmpgt_ppzz_h helper_sve_cmpgt_ppzz_h_aarch64eb +#define helper_sve_cmpgt_ppzi_s helper_sve_cmpgt_ppzi_s_aarch64eb #define helper_sve_cmpgt_ppzw_s helper_sve_cmpgt_ppzw_s_aarch64eb #define helper_sve_cmpgt_ppzz_s helper_sve_cmpgt_ppzz_s_aarch64eb +#define helper_sve_cmphi_ppzi_b helper_sve_cmphi_ppzi_b_aarch64eb #define helper_sve_cmphi_ppzw_b helper_sve_cmphi_ppzw_b_aarch64eb #define helper_sve_cmphi_ppzz_b helper_sve_cmphi_ppzz_b_aarch64eb +#define helper_sve_cmphi_ppzi_d helper_sve_cmphi_ppzi_d_aarch64eb #define helper_sve_cmphi_ppzw_d helper_sve_cmphi_ppzw_d_aarch64eb #define helper_sve_cmphi_ppzz_d helper_sve_cmphi_ppzz_d_aarch64eb +#define helper_sve_cmphi_ppzi_h helper_sve_cmphi_ppzi_h_aarch64eb #define helper_sve_cmphi_ppzw_h helper_sve_cmphi_ppzw_h_aarch64eb #define helper_sve_cmphi_ppzz_h helper_sve_cmphi_ppzz_h_aarch64eb +#define helper_sve_cmphi_ppzi_s helper_sve_cmphi_ppzi_s_aarch64eb #define helper_sve_cmphi_ppzw_s helper_sve_cmphi_ppzw_s_aarch64eb #define helper_sve_cmphi_ppzz_s helper_sve_cmphi_ppzz_s_aarch64eb +#define helper_sve_cmphs_ppzi_b helper_sve_cmphs_ppzi_b_aarch64eb #define helper_sve_cmphs_ppzw_b helper_sve_cmphs_ppzw_b_aarch64eb #define helper_sve_cmphs_ppzz_b helper_sve_cmphs_ppzz_b_aarch64eb +#define helper_sve_cmphs_ppzi_d helper_sve_cmphs_ppzi_d_aarch64eb #define helper_sve_cmphs_ppzw_d helper_sve_cmphs_ppzw_d_aarch64eb #define helper_sve_cmphs_ppzz_d helper_sve_cmphs_ppzz_d_aarch64eb +#define helper_sve_cmphs_ppzi_h helper_sve_cmphs_ppzi_h_aarch64eb #define helper_sve_cmphs_ppzw_h helper_sve_cmphs_ppzw_h_aarch64eb #define helper_sve_cmphs_ppzz_h helper_sve_cmphs_ppzz_h_aarch64eb +#define helper_sve_cmphs_ppzi_s helper_sve_cmphs_ppzi_s_aarch64eb #define helper_sve_cmphs_ppzw_s helper_sve_cmphs_ppzw_s_aarch64eb #define helper_sve_cmphs_ppzz_s helper_sve_cmphs_ppzz_s_aarch64eb +#define helper_sve_cmple_ppzi_b helper_sve_cmple_ppzi_b_aarch64eb #define helper_sve_cmple_ppzw_b helper_sve_cmple_ppzw_b_aarch64eb +#define helper_sve_cmple_ppzi_d helper_sve_cmple_ppzi_d_aarch64eb #define helper_sve_cmple_ppzw_d helper_sve_cmple_ppzw_d_aarch64eb +#define helper_sve_cmple_ppzi_h helper_sve_cmple_ppzi_h_aarch64eb #define helper_sve_cmple_ppzw_h helper_sve_cmple_ppzw_h_aarch64eb +#define helper_sve_cmple_ppzi_s helper_sve_cmple_ppzi_s_aarch64eb #define helper_sve_cmple_ppzw_s helper_sve_cmple_ppzw_s_aarch64eb +#define helper_sve_cmplo_ppzi_b helper_sve_cmplo_ppzi_b_aarch64eb #define helper_sve_cmplo_ppzw_b helper_sve_cmplo_ppzw_b_aarch64eb +#define helper_sve_cmplo_ppzi_d helper_sve_cmplo_ppzi_d_aarch64eb #define helper_sve_cmplo_ppzw_d helper_sve_cmplo_ppzw_d_aarch64eb +#define helper_sve_cmplo_ppzi_h helper_sve_cmplo_ppzi_h_aarch64eb #define helper_sve_cmplo_ppzw_h helper_sve_cmplo_ppzw_h_aarch64eb +#define helper_sve_cmplo_ppzi_s helper_sve_cmplo_ppzi_s_aarch64eb #define helper_sve_cmplo_ppzw_s helper_sve_cmplo_ppzw_s_aarch64eb +#define helper_sve_cmpls_ppzi_b helper_sve_cmpls_ppzi_b_aarch64eb #define helper_sve_cmpls_ppzw_b helper_sve_cmpls_ppzw_b_aarch64eb +#define helper_sve_cmpls_ppzi_d helper_sve_cmpls_ppzi_d_aarch64eb #define helper_sve_cmpls_ppzw_d helper_sve_cmpls_ppzw_d_aarch64eb +#define helper_sve_cmpls_ppzi_h helper_sve_cmpls_ppzi_h_aarch64eb #define helper_sve_cmpls_ppzw_h helper_sve_cmpls_ppzw_h_aarch64eb +#define helper_sve_cmpls_ppzi_s helper_sve_cmpls_ppzi_s_aarch64eb #define helper_sve_cmpls_ppzw_s helper_sve_cmpls_ppzw_s_aarch64eb +#define helper_sve_cmplt_ppzi_b helper_sve_cmplt_ppzi_b_aarch64eb #define helper_sve_cmplt_ppzw_b helper_sve_cmplt_ppzw_b_aarch64eb +#define helper_sve_cmplt_ppzi_d helper_sve_cmplt_ppzi_d_aarch64eb #define helper_sve_cmplt_ppzw_d helper_sve_cmplt_ppzw_d_aarch64eb +#define helper_sve_cmplt_ppzi_h helper_sve_cmplt_ppzi_h_aarch64eb #define helper_sve_cmplt_ppzw_h helper_sve_cmplt_ppzw_h_aarch64eb +#define helper_sve_cmplt_ppzi_s helper_sve_cmplt_ppzi_s_aarch64eb #define helper_sve_cmplt_ppzw_s helper_sve_cmplt_ppzw_s_aarch64eb +#define helper_sve_cmpne_ppzi_b helper_sve_cmpne_ppzi_b_aarch64eb #define helper_sve_cmpne_ppzw_b helper_sve_cmpne_ppzw_b_aarch64eb #define helper_sve_cmpne_ppzz_b helper_sve_cmpne_ppzz_b_aarch64eb +#define helper_sve_cmpne_ppzi_d helper_sve_cmpne_ppzi_d_aarch64eb #define helper_sve_cmpne_ppzw_d helper_sve_cmpne_ppzw_d_aarch64eb #define helper_sve_cmpne_ppzz_d helper_sve_cmpne_ppzz_d_aarch64eb +#define helper_sve_cmpne_ppzi_h helper_sve_cmpne_ppzi_h_aarch64eb #define helper_sve_cmpne_ppzw_h helper_sve_cmpne_ppzw_h_aarch64eb #define helper_sve_cmpne_ppzz_h helper_sve_cmpne_ppzz_h_aarch64eb +#define helper_sve_cmpne_ppzi_s helper_sve_cmpne_ppzi_s_aarch64eb #define helper_sve_cmpne_ppzw_s helper_sve_cmpne_ppzw_s_aarch64eb #define helper_sve_cmpne_ppzz_s helper_sve_cmpne_ppzz_s_aarch64eb #define helper_sve_cnot_b helper_sve_cnot_b_aarch64eb diff --git a/qemu/header_gen.py b/qemu/header_gen.py index b0e75561..4e111fa2 100644 --- a/qemu/header_gen.py +++ b/qemu/header_gen.py @@ -3351,68 +3351,108 @@ aarch64_symbols = ( 'helper_sve_clz_d', 'helper_sve_clz_h', 'helper_sve_clz_s', + 'helper_sve_cmpeq_ppzi_b', 'helper_sve_cmpeq_ppzw_b', 'helper_sve_cmpeq_ppzz_b', + 'helper_sve_cmpeq_ppzi_d', 'helper_sve_cmpeq_ppzw_d', 'helper_sve_cmpeq_ppzz_d', + 'helper_sve_cmpeq_ppzi_h', 'helper_sve_cmpeq_ppzw_h', 'helper_sve_cmpeq_ppzz_h', + 'helper_sve_cmpeq_ppzi_s', 'helper_sve_cmpeq_ppzw_s', 'helper_sve_cmpeq_ppzz_s', + 'helper_sve_cmpge_ppzi_b', 'helper_sve_cmpge_ppzw_b', 'helper_sve_cmpge_ppzz_b', + 'helper_sve_cmpge_ppzi_d', 'helper_sve_cmpge_ppzw_d', 'helper_sve_cmpge_ppzz_d', + 'helper_sve_cmpge_ppzi_h', 'helper_sve_cmpge_ppzw_h', 'helper_sve_cmpge_ppzz_h', + 'helper_sve_cmpge_ppzi_s', 'helper_sve_cmpge_ppzw_s', 'helper_sve_cmpge_ppzz_s', + 'helper_sve_cmpgt_ppzi_b', 'helper_sve_cmpgt_ppzw_b', 'helper_sve_cmpgt_ppzz_b', + 'helper_sve_cmpgt_ppzi_d', 'helper_sve_cmpgt_ppzw_d', 'helper_sve_cmpgt_ppzz_d', + 'helper_sve_cmpgt_ppzi_h', 'helper_sve_cmpgt_ppzw_h', 'helper_sve_cmpgt_ppzz_h', + 'helper_sve_cmpgt_ppzi_s', 'helper_sve_cmpgt_ppzw_s', 'helper_sve_cmpgt_ppzz_s', + 'helper_sve_cmphi_ppzi_b', 'helper_sve_cmphi_ppzw_b', 'helper_sve_cmphi_ppzz_b', + 'helper_sve_cmphi_ppzi_d', 'helper_sve_cmphi_ppzw_d', 'helper_sve_cmphi_ppzz_d', + 'helper_sve_cmphi_ppzi_h', 'helper_sve_cmphi_ppzw_h', 'helper_sve_cmphi_ppzz_h', + 'helper_sve_cmphi_ppzi_s', 'helper_sve_cmphi_ppzw_s', 'helper_sve_cmphi_ppzz_s', + 'helper_sve_cmphs_ppzi_b', 'helper_sve_cmphs_ppzw_b', 'helper_sve_cmphs_ppzz_b', + 'helper_sve_cmphs_ppzi_d', 'helper_sve_cmphs_ppzw_d', 'helper_sve_cmphs_ppzz_d', + 'helper_sve_cmphs_ppzi_h', 'helper_sve_cmphs_ppzw_h', 'helper_sve_cmphs_ppzz_h', + 'helper_sve_cmphs_ppzi_s', 'helper_sve_cmphs_ppzw_s', 'helper_sve_cmphs_ppzz_s', + 'helper_sve_cmple_ppzi_b', 'helper_sve_cmple_ppzw_b', + 'helper_sve_cmple_ppzi_d', 'helper_sve_cmple_ppzw_d', + 'helper_sve_cmple_ppzi_h', 'helper_sve_cmple_ppzw_h', + 'helper_sve_cmple_ppzi_s', 'helper_sve_cmple_ppzw_s', + 'helper_sve_cmplo_ppzi_b', 'helper_sve_cmplo_ppzw_b', + 'helper_sve_cmplo_ppzi_d', 'helper_sve_cmplo_ppzw_d', + 'helper_sve_cmplo_ppzi_h', 'helper_sve_cmplo_ppzw_h', + 'helper_sve_cmplo_ppzi_s', 'helper_sve_cmplo_ppzw_s', + 'helper_sve_cmpls_ppzi_b', 'helper_sve_cmpls_ppzw_b', + 'helper_sve_cmpls_ppzi_d', 'helper_sve_cmpls_ppzw_d', + 'helper_sve_cmpls_ppzi_h', 'helper_sve_cmpls_ppzw_h', + 'helper_sve_cmpls_ppzi_s', 'helper_sve_cmpls_ppzw_s', + 'helper_sve_cmplt_ppzi_b', 'helper_sve_cmplt_ppzw_b', + 'helper_sve_cmplt_ppzi_d', 'helper_sve_cmplt_ppzw_d', + 'helper_sve_cmplt_ppzi_h', 'helper_sve_cmplt_ppzw_h', + 'helper_sve_cmplt_ppzi_s', 'helper_sve_cmplt_ppzw_s', + 'helper_sve_cmpne_ppzi_b', 'helper_sve_cmpne_ppzw_b', 'helper_sve_cmpne_ppzz_b', + 'helper_sve_cmpne_ppzi_d', 'helper_sve_cmpne_ppzw_d', 'helper_sve_cmpne_ppzz_d', + 'helper_sve_cmpne_ppzi_h', 'helper_sve_cmpne_ppzw_h', 'helper_sve_cmpne_ppzz_h', + 'helper_sve_cmpne_ppzi_s', 'helper_sve_cmpne_ppzw_s', 'helper_sve_cmpne_ppzz_s', 'helper_sve_cnot_b', diff --git a/qemu/target/arm/helper-sve.h b/qemu/target/arm/helper-sve.h index 6ffd1fbe..ae38c0a4 100644 --- a/qemu/target/arm/helper-sve.h +++ b/qemu/target/arm/helper-sve.h @@ -605,6 +605,50 @@ DEF_HELPER_FLAGS_5(sve_cmplo_ppzw_s, TCG_CALL_NO_RWG, DEF_HELPER_FLAGS_5(sve_cmpls_ppzw_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpeq_ppzi_b, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpne_ppzi_b, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpgt_ppzi_b, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpge_ppzi_b, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmplt_ppzi_b, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmple_ppzi_b, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmphs_ppzi_b, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmphi_ppzi_b, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmplo_ppzi_b, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpls_ppzi_b, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) + +DEF_HELPER_FLAGS_4(sve_cmpeq_ppzi_h, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpne_ppzi_h, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpgt_ppzi_h, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpge_ppzi_h, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmplt_ppzi_h, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmple_ppzi_h, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmphs_ppzi_h, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmphi_ppzi_h, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmplo_ppzi_h, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpls_ppzi_h, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) + +DEF_HELPER_FLAGS_4(sve_cmpeq_ppzi_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpne_ppzi_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpgt_ppzi_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpge_ppzi_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmplt_ppzi_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmple_ppzi_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmphs_ppzi_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmphi_ppzi_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmplo_ppzi_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpls_ppzi_s, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) + +DEF_HELPER_FLAGS_4(sve_cmpeq_ppzi_d, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpne_ppzi_d, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpgt_ppzi_d, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpge_ppzi_d, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmplt_ppzi_d, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmple_ppzi_d, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmphs_ppzi_d, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmphi_ppzi_d, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmplo_ppzi_d, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_cmpls_ppzi_d, TCG_CALL_NO_RWG, i32, ptr, ptr, ptr, i32) + DEF_HELPER_FLAGS_5(sve_and_pppp, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_5(sve_bic_pppp, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_5(sve_eor_pppp, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32) diff --git a/qemu/target/arm/sve.decode b/qemu/target/arm/sve.decode index cb0046d1..3edb04de 100644 --- a/qemu/target/arm/sve.decode +++ b/qemu/target/arm/sve.decode @@ -131,6 +131,11 @@ @rdn_dbm ........ .. .... dbm:13 rd:5 \ &rr_dbm rn=%reg_movprfx +# Predicate output, vector and immediate input, +# controlling predicate, element size. +@pd_pg_rn_i7 ........ esz:2 . imm:7 . pg:3 rn:5 . rd:4 &rpri_esz +@pd_pg_rn_i5 ........ esz:2 . imm:s5 ... pg:3 rn:5 . rd:4 &rpri_esz + # Basic Load/Store with 9-bit immediate offset @pd_rn_i9 ........ ........ ...... rn:5 . rd:4 \ &rri imm=%imm9_16_10 @@ -496,6 +501,24 @@ CMPHI_ppzw 00100100 .. 0 ..... 110 ... ..... 1 .... @pd_pg_rn_rm CMPLO_ppzw 00100100 .. 0 ..... 111 ... ..... 0 .... @pd_pg_rn_rm CMPLS_ppzw 00100100 .. 0 ..... 111 ... ..... 1 .... @pd_pg_rn_rm +### SVE Integer Compare - Unsigned Immediate Group + +# SVE integer compare with unsigned immediate +CMPHS_ppzi 00100100 .. 1 ....... 0 ... ..... 0 .... @pd_pg_rn_i7 +CMPHI_ppzi 00100100 .. 1 ....... 0 ... ..... 1 .... @pd_pg_rn_i7 +CMPLO_ppzi 00100100 .. 1 ....... 1 ... ..... 0 .... @pd_pg_rn_i7 +CMPLS_ppzi 00100100 .. 1 ....... 1 ... ..... 1 .... @pd_pg_rn_i7 + +### SVE Integer Compare - Signed Immediate Group + +# SVE integer compare with signed immediate +CMPGE_ppzi 00100101 .. 0 ..... 000 ... ..... 0 .... @pd_pg_rn_i5 +CMPGT_ppzi 00100101 .. 0 ..... 000 ... ..... 1 .... @pd_pg_rn_i5 +CMPLT_ppzi 00100101 .. 0 ..... 001 ... ..... 0 .... @pd_pg_rn_i5 +CMPLE_ppzi 00100101 .. 0 ..... 001 ... ..... 1 .... @pd_pg_rn_i5 +CMPEQ_ppzi 00100101 .. 0 ..... 100 ... ..... 0 .... @pd_pg_rn_i5 +CMPNE_ppzi 00100101 .. 0 ..... 100 ... ..... 1 .... @pd_pg_rn_i5 + ### SVE Predicate Logical Operations Group # SVE predicate logical operations diff --git a/qemu/target/arm/sve_helper.c b/qemu/target/arm/sve_helper.c index d68420c1..8beb8852 100644 --- a/qemu/target/arm/sve_helper.c +++ b/qemu/target/arm/sve_helper.c @@ -2387,3 +2387,91 @@ DO_CMP_PPZW_S(sve_cmpls_ppzw_s, uint32_t, uint64_t, <=) #undef DO_CMP_PPZW_H #undef DO_CMP_PPZW_S #undef DO_CMP_PPZW + +/* Similar, but the second source is immediate. */ +#define DO_CMP_PPZI(NAME, TYPE, OP, H, MASK) \ +uint32_t HELPER(NAME)(void *vd, void *vn, void *vg, uint32_t desc) \ +{ \ + intptr_t opr_sz = simd_oprsz(desc); \ + uint32_t flags = PREDTEST_INIT; \ + TYPE mm = simd_data(desc); \ + intptr_t i = opr_sz; \ + do { \ + uint64_t out = 0, pg; \ + do { \ + i -= sizeof(TYPE), out <<= sizeof(TYPE); \ + TYPE nn = *(TYPE *)(vn + H(i)); \ + out |= nn OP mm; \ + } while (i & 63); \ + pg = *(uint64_t *)(vg + (i >> 3)) & MASK; \ + out &= pg; \ + *(uint64_t *)(vd + (i >> 3)) = out; \ + flags = iter_predtest_bwd(out, pg, flags); \ + } while (i > 0); \ + return flags; \ +} + +#define DO_CMP_PPZI_B(NAME, TYPE, OP) \ + DO_CMP_PPZI(NAME, TYPE, OP, H1, 0xffffffffffffffffull) +#define DO_CMP_PPZI_H(NAME, TYPE, OP) \ + DO_CMP_PPZI(NAME, TYPE, OP, H1_2, 0x5555555555555555ull) +#define DO_CMP_PPZI_S(NAME, TYPE, OP) \ + DO_CMP_PPZI(NAME, TYPE, OP, H1_4, 0x1111111111111111ull) +#define DO_CMP_PPZI_D(NAME, TYPE, OP) \ + DO_CMP_PPZI(NAME, TYPE, OP, , 0x0101010101010101ull) + +DO_CMP_PPZI_B(sve_cmpeq_ppzi_b, uint8_t, ==) +DO_CMP_PPZI_H(sve_cmpeq_ppzi_h, uint16_t, ==) +DO_CMP_PPZI_S(sve_cmpeq_ppzi_s, uint32_t, ==) +DO_CMP_PPZI_D(sve_cmpeq_ppzi_d, uint64_t, ==) + +DO_CMP_PPZI_B(sve_cmpne_ppzi_b, uint8_t, !=) +DO_CMP_PPZI_H(sve_cmpne_ppzi_h, uint16_t, !=) +DO_CMP_PPZI_S(sve_cmpne_ppzi_s, uint32_t, !=) +DO_CMP_PPZI_D(sve_cmpne_ppzi_d, uint64_t, !=) + +DO_CMP_PPZI_B(sve_cmpgt_ppzi_b, int8_t, >) +DO_CMP_PPZI_H(sve_cmpgt_ppzi_h, int16_t, >) +DO_CMP_PPZI_S(sve_cmpgt_ppzi_s, int32_t, >) +DO_CMP_PPZI_D(sve_cmpgt_ppzi_d, int64_t, >) + +DO_CMP_PPZI_B(sve_cmpge_ppzi_b, int8_t, >=) +DO_CMP_PPZI_H(sve_cmpge_ppzi_h, int16_t, >=) +DO_CMP_PPZI_S(sve_cmpge_ppzi_s, int32_t, >=) +DO_CMP_PPZI_D(sve_cmpge_ppzi_d, int64_t, >=) + +DO_CMP_PPZI_B(sve_cmphi_ppzi_b, uint8_t, >) +DO_CMP_PPZI_H(sve_cmphi_ppzi_h, uint16_t, >) +DO_CMP_PPZI_S(sve_cmphi_ppzi_s, uint32_t, >) +DO_CMP_PPZI_D(sve_cmphi_ppzi_d, uint64_t, >) + +DO_CMP_PPZI_B(sve_cmphs_ppzi_b, uint8_t, >=) +DO_CMP_PPZI_H(sve_cmphs_ppzi_h, uint16_t, >=) +DO_CMP_PPZI_S(sve_cmphs_ppzi_s, uint32_t, >=) +DO_CMP_PPZI_D(sve_cmphs_ppzi_d, uint64_t, >=) + +DO_CMP_PPZI_B(sve_cmplt_ppzi_b, int8_t, <) +DO_CMP_PPZI_H(sve_cmplt_ppzi_h, int16_t, <) +DO_CMP_PPZI_S(sve_cmplt_ppzi_s, int32_t, <) +DO_CMP_PPZI_D(sve_cmplt_ppzi_d, int64_t, <) + +DO_CMP_PPZI_B(sve_cmple_ppzi_b, int8_t, <=) +DO_CMP_PPZI_H(sve_cmple_ppzi_h, int16_t, <=) +DO_CMP_PPZI_S(sve_cmple_ppzi_s, int32_t, <=) +DO_CMP_PPZI_D(sve_cmple_ppzi_d, int64_t, <=) + +DO_CMP_PPZI_B(sve_cmplo_ppzi_b, uint8_t, <) +DO_CMP_PPZI_H(sve_cmplo_ppzi_h, uint16_t, <) +DO_CMP_PPZI_S(sve_cmplo_ppzi_s, uint32_t, <) +DO_CMP_PPZI_D(sve_cmplo_ppzi_d, uint64_t, <) + +DO_CMP_PPZI_B(sve_cmpls_ppzi_b, uint8_t, <=) +DO_CMP_PPZI_H(sve_cmpls_ppzi_h, uint16_t, <=) +DO_CMP_PPZI_S(sve_cmpls_ppzi_s, uint32_t, <=) +DO_CMP_PPZI_D(sve_cmpls_ppzi_d, uint64_t, <=) + +#undef DO_CMP_PPZI_B +#undef DO_CMP_PPZI_H +#undef DO_CMP_PPZI_S +#undef DO_CMP_PPZI_D +#undef DO_CMP_PPZI diff --git a/qemu/target/arm/translate-sve.c b/qemu/target/arm/translate-sve.c index 9dbf327d..e51fba08 100644 --- a/qemu/target/arm/translate-sve.c +++ b/qemu/target/arm/translate-sve.c @@ -30,7 +30,8 @@ #include "exec/helper-gen.h" #include "translate-a64.h" - +typedef void gen_helper_gvec_flags_3(TCGContext *, TCGv_i32, TCGv_ptr, TCGv_ptr, + TCGv_ptr, TCGv_i32); typedef void gen_helper_gvec_flags_4(TCGContext *, TCGv_i32, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); @@ -2891,6 +2892,72 @@ DO_PPZW(CMPLS, cmpls) #undef DO_PPZW +/* + *** SVE Integer Compare - Immediate Groups + */ + +static bool do_ppzi_flags(DisasContext *s, arg_rpri_esz *a, + gen_helper_gvec_flags_3 *gen_fn) +{ + TCGv_ptr pd, zn, pg; + unsigned vsz; + TCGv_i32 t; + TCGContext *tcg_ctx; + + if (gen_fn == NULL) { + return false; + } + if (!sve_access_check(s)) { + return true; + } + + tcg_ctx = s->uc->tcg_ctx; + vsz = vec_full_reg_size(s); + t = tcg_const_i32(tcg_ctx, simd_desc(vsz, vsz, a->imm)); + pd = tcg_temp_new_ptr(tcg_ctx); + zn = tcg_temp_new_ptr(tcg_ctx); + pg = tcg_temp_new_ptr(tcg_ctx); + + tcg_gen_addi_ptr(tcg_ctx, pd, tcg_ctx->cpu_env, pred_full_reg_offset(s, a->rd)); + tcg_gen_addi_ptr(tcg_ctx, zn, tcg_ctx->cpu_env, vec_full_reg_offset(s, a->rn)); + tcg_gen_addi_ptr(tcg_ctx, pg, tcg_ctx->cpu_env, pred_full_reg_offset(s, a->pg)); + + gen_fn(tcg_ctx, t, pd, zn, pg, t); + + tcg_temp_free_ptr(tcg_ctx, pd); + tcg_temp_free_ptr(tcg_ctx, zn); + tcg_temp_free_ptr(tcg_ctx, pg); + + do_pred_flags(s, t); + + tcg_temp_free_i32(tcg_ctx, t); + return true; +} + +#define DO_PPZI(NAME, name) \ +static bool trans_##NAME##_ppzi(DisasContext *s, arg_rpri_esz *a, \ + uint32_t insn) \ +{ \ + static gen_helper_gvec_flags_3 * const fns[4] = { \ + gen_helper_sve_##name##_ppzi_b, gen_helper_sve_##name##_ppzi_h, \ + gen_helper_sve_##name##_ppzi_s, gen_helper_sve_##name##_ppzi_d, \ + }; \ + return do_ppzi_flags(s, a, fns[a->esz]); \ +} + +DO_PPZI(CMPEQ, cmpeq) +DO_PPZI(CMPNE, cmpne) +DO_PPZI(CMPGT, cmpgt) +DO_PPZI(CMPGE, cmpge) +DO_PPZI(CMPHI, cmphi) +DO_PPZI(CMPHS, cmphs) +DO_PPZI(CMPLT, cmplt) +DO_PPZI(CMPLE, cmple) +DO_PPZI(CMPLO, cmplo) +DO_PPZI(CMPLS, cmpls) + +#undef DO_PPZI + /* *** SVE Memory - 32-bit Gather and Unsized Contiguous Group */