From b0be0d28cc75abbf811481db5457955c4c6e74ad Mon Sep 17 00:00:00 2001 From: LIU Zhiwei Date: Fri, 26 Feb 2021 15:20:18 -0500 Subject: [PATCH] softfloat: Define operations for bfloat16 Backports 8282310d8535cc2a8431c516e907da79f92df6eb --- qemu/aarch64.h | 18 +++ qemu/aarch64eb.h | 18 +++ qemu/arm.h | 18 +++ qemu/armeb.h | 18 +++ qemu/fpu/softfloat.c | 169 +++++++++++++++++++++++++++++ qemu/header_gen.py | 18 +++ qemu/include/fpu/softfloat-types.h | 5 + qemu/include/fpu/softfloat.h | 38 +++++++ qemu/m68k.h | 18 +++ qemu/mips.h | 18 +++ qemu/mips64.h | 18 +++ qemu/mips64el.h | 18 +++ qemu/mipsel.h | 18 +++ qemu/powerpc.h | 18 +++ qemu/riscv32.h | 18 +++ qemu/riscv64.h | 18 +++ qemu/sparc.h | 18 +++ qemu/sparc64.h | 18 +++ qemu/x86_64.h | 18 +++ 19 files changed, 500 insertions(+) diff --git a/qemu/aarch64.h b/qemu/aarch64.h index f70a0262..95a1232f 100644 --- a/qemu/aarch64.h +++ b/qemu/aarch64.h @@ -197,6 +197,24 @@ #define ats_write ats_write_aarch64 #define bad_mode_switch bad_mode_switch_aarch64 #define bank_number bank_number_aarch64 +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_aarch64 +#define bfloat16_add bfloat16_add_aarch64 +#define bfloat16_sub bfloat16_sub_aarch64 +#define bfloat16_mul bfloat16_mul_aarch64 +#define bfloat16_div bfloat16_div_aarch64 +#define bfloat16_muladd bfloat16_muladd_aarch64 +#define bfloat16_scalbn bfloat16_scalbn_aarch64 +#define bfloat16_min bfloat16_min_aarch64 +#define bfloat16_max bfloat16_max_aarch64 +#define bfloat16_minnum bfloat16_minnum_aarch64 +#define bfloat16_maxnum bfloat16_maxnum_aarch64 +#define bfloat16_minnummag bfloat16_minnummag_aarch64 +#define bfloat16_maxnummag bfloat16_maxnummag_aarch64 +#define bfloat16_sqrt bfloat16_sqrt_aarch64 +#define bfloat16_compare bfloat16_compare_aarch64 +#define bfloat16_compare_quiet bfloat16_compare_quiet_aarch64 +#define bfloat16_silence_nan bfloat16_silence_nan_aarch64 +#define bfloat16_default_nan bfloat16_default_nan_aarch64 #define bitmap_zero_extend bitmap_zero_extend_aarch64 #define bp_wp_matches bp_wp_matches_aarch64 #define breakpoint_invalidate breakpoint_invalidate_aarch64 diff --git a/qemu/aarch64eb.h b/qemu/aarch64eb.h index 5ba8fb7a..3101aa6b 100644 --- a/qemu/aarch64eb.h +++ b/qemu/aarch64eb.h @@ -197,6 +197,24 @@ #define ats_write ats_write_aarch64eb #define bad_mode_switch bad_mode_switch_aarch64eb #define bank_number bank_number_aarch64eb +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_aarch64eb +#define bfloat16_add bfloat16_add_aarch64eb +#define bfloat16_sub bfloat16_sub_aarch64eb +#define bfloat16_mul bfloat16_mul_aarch64eb +#define bfloat16_div bfloat16_div_aarch64eb +#define bfloat16_muladd bfloat16_muladd_aarch64eb +#define bfloat16_scalbn bfloat16_scalbn_aarch64eb +#define bfloat16_min bfloat16_min_aarch64eb +#define bfloat16_max bfloat16_max_aarch64eb +#define bfloat16_minnum bfloat16_minnum_aarch64eb +#define bfloat16_maxnum bfloat16_maxnum_aarch64eb +#define bfloat16_minnummag bfloat16_minnummag_aarch64eb +#define bfloat16_maxnummag bfloat16_maxnummag_aarch64eb +#define bfloat16_sqrt bfloat16_sqrt_aarch64eb +#define bfloat16_compare bfloat16_compare_aarch64eb +#define bfloat16_compare_quiet bfloat16_compare_quiet_aarch64eb +#define bfloat16_silence_nan bfloat16_silence_nan_aarch64eb +#define bfloat16_default_nan bfloat16_default_nan_aarch64eb #define bitmap_zero_extend bitmap_zero_extend_aarch64eb #define bp_wp_matches bp_wp_matches_aarch64eb #define breakpoint_invalidate breakpoint_invalidate_aarch64eb diff --git a/qemu/arm.h b/qemu/arm.h index e5863596..b9657fcf 100644 --- a/qemu/arm.h +++ b/qemu/arm.h @@ -197,6 +197,24 @@ #define ats_write ats_write_arm #define bad_mode_switch bad_mode_switch_arm #define bank_number bank_number_arm +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_arm +#define bfloat16_add bfloat16_add_arm +#define bfloat16_sub bfloat16_sub_arm +#define bfloat16_mul bfloat16_mul_arm +#define bfloat16_div bfloat16_div_arm +#define bfloat16_muladd bfloat16_muladd_arm +#define bfloat16_scalbn bfloat16_scalbn_arm +#define bfloat16_min bfloat16_min_arm +#define bfloat16_max bfloat16_max_arm +#define bfloat16_minnum bfloat16_minnum_arm +#define bfloat16_maxnum bfloat16_maxnum_arm +#define bfloat16_minnummag bfloat16_minnummag_arm +#define bfloat16_maxnummag bfloat16_maxnummag_arm +#define bfloat16_sqrt bfloat16_sqrt_arm +#define bfloat16_compare bfloat16_compare_arm +#define bfloat16_compare_quiet bfloat16_compare_quiet_arm +#define bfloat16_silence_nan bfloat16_silence_nan_arm +#define bfloat16_default_nan bfloat16_default_nan_arm #define bitmap_zero_extend bitmap_zero_extend_arm #define bp_wp_matches bp_wp_matches_arm #define breakpoint_invalidate breakpoint_invalidate_arm diff --git a/qemu/armeb.h b/qemu/armeb.h index de9b6584..a64464bd 100644 --- a/qemu/armeb.h +++ b/qemu/armeb.h @@ -197,6 +197,24 @@ #define ats_write ats_write_armeb #define bad_mode_switch bad_mode_switch_armeb #define bank_number bank_number_armeb +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_armeb +#define bfloat16_add bfloat16_add_armeb +#define bfloat16_sub bfloat16_sub_armeb +#define bfloat16_mul bfloat16_mul_armeb +#define bfloat16_div bfloat16_div_armeb +#define bfloat16_muladd bfloat16_muladd_armeb +#define bfloat16_scalbn bfloat16_scalbn_armeb +#define bfloat16_min bfloat16_min_armeb +#define bfloat16_max bfloat16_max_armeb +#define bfloat16_minnum bfloat16_minnum_armeb +#define bfloat16_maxnum bfloat16_maxnum_armeb +#define bfloat16_minnummag bfloat16_minnummag_armeb +#define bfloat16_maxnummag bfloat16_maxnummag_armeb +#define bfloat16_sqrt bfloat16_sqrt_armeb +#define bfloat16_compare bfloat16_compare_armeb +#define bfloat16_compare_quiet bfloat16_compare_quiet_armeb +#define bfloat16_silence_nan bfloat16_silence_nan_armeb +#define bfloat16_default_nan bfloat16_default_nan_armeb #define bitmap_zero_extend bitmap_zero_extend_armeb #define bp_wp_matches bp_wp_matches_armeb #define breakpoint_invalidate breakpoint_invalidate_armeb diff --git a/qemu/fpu/softfloat.c b/qemu/fpu/softfloat.c index c2d6f7ed..896d81a4 100644 --- a/qemu/fpu/softfloat.c +++ b/qemu/fpu/softfloat.c @@ -555,6 +555,10 @@ static const FloatFmt float16_params_ahp = { .arm_althp = true }; +static const FloatFmt bfloat16_params = { + FLOAT_PARAMS(8, 7) +}; + static const FloatFmt float32_params = { FLOAT_PARAMS(8, 23) }; @@ -581,6 +585,11 @@ static inline FloatParts float16_unpack_raw(float16 f) return unpack_raw(float16_params, f); } +static inline FloatParts bfloat16_unpack_raw(bfloat16 f) +{ + return unpack_raw(bfloat16_params, f); +} + static inline FloatParts float32_unpack_raw(float32 f) { return unpack_raw(float32_params, f); @@ -604,6 +613,11 @@ static inline float16 float16_pack_raw(FloatParts p) return make_float16(pack_raw(float16_params, p)); } +static inline bfloat16 bfloat16_pack_raw(FloatParts p) +{ + return pack_raw(bfloat16_params, p); +} + static inline float32 float32_pack_raw(FloatParts p) { return make_float32(pack_raw(float32_params, p)); @@ -821,6 +835,11 @@ static FloatParts float16_unpack_canonical(float16 f, float_status *s) return float16a_unpack_canonical(f, s, &float16_params); } +static FloatParts bfloat16_unpack_canonical(bfloat16 f, float_status *s) +{ + return sf_canonicalize(bfloat16_unpack_raw(f), &bfloat16_params, s); +} + static float16 float16a_round_pack_canonical(FloatParts p, float_status *s, const FloatFmt *params) { @@ -832,6 +851,11 @@ static float16 float16_round_pack_canonical(FloatParts p, float_status *s) return float16a_round_pack_canonical(p, s, &float16_params); } +static bfloat16 bfloat16_round_pack_canonical(FloatParts p, float_status *s) +{ + return bfloat16_pack_raw(round_canonical(p, s, &bfloat16_params)); +} + static FloatParts float32_unpack_canonical(float32 f, float_status *s) { return sf_canonicalize(float32_unpack_raw(f), &float32_params, s); @@ -1159,6 +1183,28 @@ float64_sub(float64 a, float64 b, float_status *s) return float64_addsub(a, b, s, hard_f64_sub, soft_f64_sub); } +/* + * Returns the result of adding or subtracting the bfloat16 + * values `a' and `b'. + */ +bfloat16 QEMU_FLATTEN bfloat16_add(bfloat16 a, bfloat16 b, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pb = bfloat16_unpack_canonical(b, status); + FloatParts pr = addsub_floats(pa, pb, false, status); + + return bfloat16_round_pack_canonical(pr, status); +} + +bfloat16 QEMU_FLATTEN bfloat16_sub(bfloat16 a, bfloat16 b, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pb = bfloat16_unpack_canonical(b, status); + FloatParts pr = addsub_floats(pa, pb, true, status); + + return bfloat16_round_pack_canonical(pr, status); +} + /* * Returns the result of multiplying the floating-point values `a' and * `b'. The operation is performed according to the IEC/IEEE Standard @@ -1261,6 +1307,20 @@ float64_mul(float64 a, float64 b, float_status *s) f64_is_zon2, f64_addsubmul_post); } +/* + * Returns the result of multiplying the bfloat16 + * values `a' and `b'. + */ + +bfloat16 QEMU_FLATTEN bfloat16_mul(bfloat16 a, bfloat16 b, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pb = bfloat16_unpack_canonical(b, status); + FloatParts pr = mul_floats(pa, pb, status); + + return bfloat16_round_pack_canonical(pr, status); +} + /* * Returns the result of multiplying the floating-point values `a' and * `b' then adding 'c', with no intermediate rounding step after the @@ -1621,6 +1681,23 @@ float64_muladd(float64 xa, float64 xb, float64 xc, int flags, float_status *s) return soft_f64_muladd(ua.s, ub.s, uc.s, flags, s); } +/* + * Returns the result of multiplying the bfloat16 values `a' + * and `b' then adding 'c', with no intermediate rounding step after the + * multiplication. + */ + +bfloat16 QEMU_FLATTEN bfloat16_muladd(bfloat16 a, bfloat16 b, bfloat16 c, + int flags, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pb = bfloat16_unpack_canonical(b, status); + FloatParts pc = bfloat16_unpack_canonical(c, status); + FloatParts pr = muladd_floats(pa, pb, pc, flags, status); + + return bfloat16_round_pack_canonical(pr, status); +} + /* * Returns the result of dividing the floating-point value `a' by the * corresponding value `b'. The operation is performed according to @@ -1787,6 +1864,20 @@ float64_div(float64 a, float64 b, float_status *s) f64_div_pre, f64_div_post); } +/* + * Returns the result of dividing the bfloat16 + * value `a' by the corresponding value `b'. + */ + +bfloat16 bfloat16_div(bfloat16 a, bfloat16 b, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pb = bfloat16_unpack_canonical(b, status); + FloatParts pr = div_floats(pa, pb, status); + + return bfloat16_round_pack_canonical(pr, status); +} + /* * Float to Float conversions * @@ -2843,6 +2934,25 @@ MINMAX(64, maxnummag, false, true, true) #undef MINMAX +#define BF16_MINMAX(name, ismin, isiee, ismag) \ +bfloat16 bfloat16_ ## name(bfloat16 a, bfloat16 b, float_status *s) \ +{ \ + FloatParts pa = bfloat16_unpack_canonical(a, s); \ + FloatParts pb = bfloat16_unpack_canonical(b, s); \ + FloatParts pr = minmax_floats(pa, pb, ismin, isiee, ismag, s); \ + \ + return bfloat16_round_pack_canonical(pr, s); \ +} + +BF16_MINMAX(min, true, false, false) +BF16_MINMAX(minnum, true, true, false) +BF16_MINMAX(minnummag, true, true, true) +BF16_MINMAX(max, false, false, false) +BF16_MINMAX(maxnum, false, true, false) +BF16_MINMAX(maxnummag, false, true, true) + +#undef BF16_MINMAX + /* Floating point compare */ static FloatRelation compare_floats(FloatParts a, FloatParts b, bool is_quiet, float_status *s) @@ -3004,6 +3114,24 @@ FloatRelation float64_compare_quiet(float64 a, float64 b, float_status *s) return f64_compare(a, b, true, s); } +static FloatRelation QEMU_FLATTEN +soft_bf16_compare(bfloat16 a, bfloat16 b, bool is_quiet, float_status *s) +{ + FloatParts pa = bfloat16_unpack_canonical(a, s); + FloatParts pb = bfloat16_unpack_canonical(b, s); + return compare_floats(pa, pb, is_quiet, s); +} + +FloatRelation bfloat16_compare(bfloat16 a, bfloat16 b, float_status *s) +{ + return soft_bf16_compare(a, b, false, s); +} + +FloatRelation bfloat16_compare_quiet(bfloat16 a, bfloat16 b, float_status *s) +{ + return soft_bf16_compare(a, b, true, s); +} + /* Multiply A by 2 raised to the power N. */ static FloatParts scalbn_decomposed(FloatParts a, int n, float_status *s) { @@ -3043,6 +3171,13 @@ float64 float64_scalbn(float64 a, int n, float_status *status) return float64_round_pack_canonical(pr, status); } +bfloat16 bfloat16_scalbn(bfloat16 a, int n, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pr = scalbn_decomposed(pa, n, status); + return bfloat16_round_pack_canonical(pr, status); +} + /* * Square Root * @@ -3193,6 +3328,13 @@ float64 QEMU_FLATTEN float64_sqrt(float64 xa, float_status *s) return soft_f64_sqrt(ua.s, s); } +bfloat16 QEMU_FLATTEN bfloat16_sqrt(bfloat16 a, float_status *status) +{ + FloatParts pa = bfloat16_unpack_canonical(a, status); + FloatParts pr = sqrt_float(pa, status, &bfloat16_params); + return bfloat16_round_pack_canonical(pr, status); +} + /*---------------------------------------------------------------------------- | The pattern for a default generated NaN. *----------------------------------------------------------------------------*/ @@ -3235,6 +3377,13 @@ float128 float128_default_nan(float_status *status) return r; } +bfloat16 bfloat16_default_nan(float_status *status) +{ + FloatParts p = parts_default_nan(status); + p.frac >>= bfloat16_params.frac_shift; + return bfloat16_pack_raw(p); +} + /*---------------------------------------------------------------------------- | Returns a quiet NaN from a signalling NaN for the floating point value `a'. *----------------------------------------------------------------------------*/ @@ -3266,6 +3415,15 @@ float64 float64_silence_nan(float64 a, float_status *status) return float64_pack_raw(p); } +bfloat16 bfloat16_silence_nan(bfloat16 a, float_status *status) +{ + FloatParts p = bfloat16_unpack_raw(a); + p.frac <<= bfloat16_params.frac_shift; + p = parts_silence_nan(p, status); + p.frac >>= bfloat16_params.frac_shift; + return bfloat16_pack_raw(p); +} + /*---------------------------------------------------------------------------- | If `a' is denormal and we are in flush-to-zero mode then set the | input-denormal exception and return zero. Otherwise just return the value. @@ -3314,6 +3472,17 @@ float64 float64_squash_input_denormal(float64 a, float_status *status) return a; } +bfloat16 bfloat16_squash_input_denormal(bfloat16 a, float_status *status) +{ + if (status->flush_inputs_to_zero) { + FloatParts p = bfloat16_unpack_raw(a); + if (parts_squash_denormal(p, status)) { + return bfloat16_set_sign(bfloat16_zero, p.sign); + } + } + return a; +} + /*---------------------------------------------------------------------------- | Takes a 64-bit fixed-point value `absZ' with binary point between bits 6 | and 7, and returns the properly rounded 32-bit integer corresponding to the diff --git a/qemu/header_gen.py b/qemu/header_gen.py index fb49bfcb..83bd433d 100644 --- a/qemu/header_gen.py +++ b/qemu/header_gen.py @@ -203,6 +203,24 @@ symbols = ( 'ats_write', 'bad_mode_switch', 'bank_number', + 'bfloat16_squash_input_denormal', + 'bfloat16_add', + 'bfloat16_sub', + 'bfloat16_mul', + 'bfloat16_div', + 'bfloat16_muladd', + 'bfloat16_scalbn', + 'bfloat16_min', + 'bfloat16_max', + 'bfloat16_minnum', + 'bfloat16_maxnum', + 'bfloat16_minnummag', + 'bfloat16_maxnummag', + 'bfloat16_sqrt', + 'bfloat16_compare', + 'bfloat16_compare_quiet', + 'bfloat16_silence_nan', + 'bfloat16_default_nan', 'bitmap_zero_extend', 'bp_wp_matches', 'breakpoint_invalidate', diff --git a/qemu/include/fpu/softfloat-types.h b/qemu/include/fpu/softfloat-types.h index c7ddcab8..8a3f20fa 100644 --- a/qemu/include/fpu/softfloat-types.h +++ b/qemu/include/fpu/softfloat-types.h @@ -112,6 +112,11 @@ typedef struct { #define make_float128(high_, low_) ((float128) { .high = high_, .low = low_ }) #define make_float128_init(high_, low_) { .high = high_, .low = low_ } +/* + * Software neural-network floating-point types. + */ +typedef uint16_t bfloat16; + /* * Software IEC/IEEE floating-point underflow tininess-detection mode. */ diff --git a/qemu/include/fpu/softfloat.h b/qemu/include/fpu/softfloat.h index 0b27ad93..06abba6b 100644 --- a/qemu/include/fpu/softfloat.h +++ b/qemu/include/fpu/softfloat.h @@ -112,6 +112,7 @@ void float_raise(uint8_t flags, float_status *status); float16 float16_squash_input_denormal(float16 a, float_status *status); float32 float32_squash_input_denormal(float32 a, float_status *status); float64 float64_squash_input_denormal(float64 a, float_status *status); +bfloat16 bfloat16_squash_input_denormal(bfloat16 a, float_status *status); /*---------------------------------------------------------------------------- | Options to indicate which negations to perform in float*_muladd() @@ -350,6 +351,43 @@ static inline bool float16_unordered_quiet(float16 a, float16 b, #define float16_three make_float16(0x4200) #define float16_infinity make_float16(0x7c00) +/*---------------------------------------------------------------------------- +| Software bfloat16 operations. +*----------------------------------------------------------------------------*/ + +bfloat16 bfloat16_add(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_sub(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_mul(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_div(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_muladd(bfloat16, bfloat16, bfloat16, int, + float_status *status); +float16 bfloat16_scalbn(bfloat16, int, float_status *status); +bfloat16 bfloat16_min(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_max(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_minnum(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_maxnum(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_minnummag(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_maxnummag(bfloat16, bfloat16, float_status *status); +bfloat16 bfloat16_sqrt(bfloat16, float_status *status); +FloatRelation bfloat16_compare(bfloat16, bfloat16, float_status *status); +FloatRelation bfloat16_compare_quiet(bfloat16, bfloat16, float_status *status); + +bfloat16 bfloat16_silence_nan(bfloat16, float_status *status); +bfloat16 bfloat16_default_nan(float_status *status); + +static inline bfloat16 bfloat16_set_sign(bfloat16 a, int sign) +{ + return (a & 0x7fff) | (sign << 15); +} + +#define bfloat16_zero 0 +#define bfloat16_half 0x3f00 +#define bfloat16_one 0x3f80 +#define bfloat16_one_point_five 0x3fc0 +#define bfloat16_two 0x4000 +#define bfloat16_three 0x4040 +#define bfloat16_infinity 0x7f80 + /*---------------------------------------------------------------------------- | The pattern for a default generated half-precision NaN. *----------------------------------------------------------------------------*/ diff --git a/qemu/m68k.h b/qemu/m68k.h index 27f65aa5..8b5a0f17 100644 --- a/qemu/m68k.h +++ b/qemu/m68k.h @@ -197,6 +197,24 @@ #define ats_write ats_write_m68k #define bad_mode_switch bad_mode_switch_m68k #define bank_number bank_number_m68k +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_m68k +#define bfloat16_add bfloat16_add_m68k +#define bfloat16_sub bfloat16_sub_m68k +#define bfloat16_mul bfloat16_mul_m68k +#define bfloat16_div bfloat16_div_m68k +#define bfloat16_muladd bfloat16_muladd_m68k +#define bfloat16_scalbn bfloat16_scalbn_m68k +#define bfloat16_min bfloat16_min_m68k +#define bfloat16_max bfloat16_max_m68k +#define bfloat16_minnum bfloat16_minnum_m68k +#define bfloat16_maxnum bfloat16_maxnum_m68k +#define bfloat16_minnummag bfloat16_minnummag_m68k +#define bfloat16_maxnummag bfloat16_maxnummag_m68k +#define bfloat16_sqrt bfloat16_sqrt_m68k +#define bfloat16_compare bfloat16_compare_m68k +#define bfloat16_compare_quiet bfloat16_compare_quiet_m68k +#define bfloat16_silence_nan bfloat16_silence_nan_m68k +#define bfloat16_default_nan bfloat16_default_nan_m68k #define bitmap_zero_extend bitmap_zero_extend_m68k #define bp_wp_matches bp_wp_matches_m68k #define breakpoint_invalidate breakpoint_invalidate_m68k diff --git a/qemu/mips.h b/qemu/mips.h index ea7ddd7e..fa503cbf 100644 --- a/qemu/mips.h +++ b/qemu/mips.h @@ -197,6 +197,24 @@ #define ats_write ats_write_mips #define bad_mode_switch bad_mode_switch_mips #define bank_number bank_number_mips +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_mips +#define bfloat16_add bfloat16_add_mips +#define bfloat16_sub bfloat16_sub_mips +#define bfloat16_mul bfloat16_mul_mips +#define bfloat16_div bfloat16_div_mips +#define bfloat16_muladd bfloat16_muladd_mips +#define bfloat16_scalbn bfloat16_scalbn_mips +#define bfloat16_min bfloat16_min_mips +#define bfloat16_max bfloat16_max_mips +#define bfloat16_minnum bfloat16_minnum_mips +#define bfloat16_maxnum bfloat16_maxnum_mips +#define bfloat16_minnummag bfloat16_minnummag_mips +#define bfloat16_maxnummag bfloat16_maxnummag_mips +#define bfloat16_sqrt bfloat16_sqrt_mips +#define bfloat16_compare bfloat16_compare_mips +#define bfloat16_compare_quiet bfloat16_compare_quiet_mips +#define bfloat16_silence_nan bfloat16_silence_nan_mips +#define bfloat16_default_nan bfloat16_default_nan_mips #define bitmap_zero_extend bitmap_zero_extend_mips #define bp_wp_matches bp_wp_matches_mips #define breakpoint_invalidate breakpoint_invalidate_mips diff --git a/qemu/mips64.h b/qemu/mips64.h index f714ce35..30290e80 100644 --- a/qemu/mips64.h +++ b/qemu/mips64.h @@ -197,6 +197,24 @@ #define ats_write ats_write_mips64 #define bad_mode_switch bad_mode_switch_mips64 #define bank_number bank_number_mips64 +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_mips64 +#define bfloat16_add bfloat16_add_mips64 +#define bfloat16_sub bfloat16_sub_mips64 +#define bfloat16_mul bfloat16_mul_mips64 +#define bfloat16_div bfloat16_div_mips64 +#define bfloat16_muladd bfloat16_muladd_mips64 +#define bfloat16_scalbn bfloat16_scalbn_mips64 +#define bfloat16_min bfloat16_min_mips64 +#define bfloat16_max bfloat16_max_mips64 +#define bfloat16_minnum bfloat16_minnum_mips64 +#define bfloat16_maxnum bfloat16_maxnum_mips64 +#define bfloat16_minnummag bfloat16_minnummag_mips64 +#define bfloat16_maxnummag bfloat16_maxnummag_mips64 +#define bfloat16_sqrt bfloat16_sqrt_mips64 +#define bfloat16_compare bfloat16_compare_mips64 +#define bfloat16_compare_quiet bfloat16_compare_quiet_mips64 +#define bfloat16_silence_nan bfloat16_silence_nan_mips64 +#define bfloat16_default_nan bfloat16_default_nan_mips64 #define bitmap_zero_extend bitmap_zero_extend_mips64 #define bp_wp_matches bp_wp_matches_mips64 #define breakpoint_invalidate breakpoint_invalidate_mips64 diff --git a/qemu/mips64el.h b/qemu/mips64el.h index 6fb367cb..98190251 100644 --- a/qemu/mips64el.h +++ b/qemu/mips64el.h @@ -197,6 +197,24 @@ #define ats_write ats_write_mips64el #define bad_mode_switch bad_mode_switch_mips64el #define bank_number bank_number_mips64el +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_mips64el +#define bfloat16_add bfloat16_add_mips64el +#define bfloat16_sub bfloat16_sub_mips64el +#define bfloat16_mul bfloat16_mul_mips64el +#define bfloat16_div bfloat16_div_mips64el +#define bfloat16_muladd bfloat16_muladd_mips64el +#define bfloat16_scalbn bfloat16_scalbn_mips64el +#define bfloat16_min bfloat16_min_mips64el +#define bfloat16_max bfloat16_max_mips64el +#define bfloat16_minnum bfloat16_minnum_mips64el +#define bfloat16_maxnum bfloat16_maxnum_mips64el +#define bfloat16_minnummag bfloat16_minnummag_mips64el +#define bfloat16_maxnummag bfloat16_maxnummag_mips64el +#define bfloat16_sqrt bfloat16_sqrt_mips64el +#define bfloat16_compare bfloat16_compare_mips64el +#define bfloat16_compare_quiet bfloat16_compare_quiet_mips64el +#define bfloat16_silence_nan bfloat16_silence_nan_mips64el +#define bfloat16_default_nan bfloat16_default_nan_mips64el #define bitmap_zero_extend bitmap_zero_extend_mips64el #define bp_wp_matches bp_wp_matches_mips64el #define breakpoint_invalidate breakpoint_invalidate_mips64el diff --git a/qemu/mipsel.h b/qemu/mipsel.h index f0e20914..75c7a3bc 100644 --- a/qemu/mipsel.h +++ b/qemu/mipsel.h @@ -197,6 +197,24 @@ #define ats_write ats_write_mipsel #define bad_mode_switch bad_mode_switch_mipsel #define bank_number bank_number_mipsel +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_mipsel +#define bfloat16_add bfloat16_add_mipsel +#define bfloat16_sub bfloat16_sub_mipsel +#define bfloat16_mul bfloat16_mul_mipsel +#define bfloat16_div bfloat16_div_mipsel +#define bfloat16_muladd bfloat16_muladd_mipsel +#define bfloat16_scalbn bfloat16_scalbn_mipsel +#define bfloat16_min bfloat16_min_mipsel +#define bfloat16_max bfloat16_max_mipsel +#define bfloat16_minnum bfloat16_minnum_mipsel +#define bfloat16_maxnum bfloat16_maxnum_mipsel +#define bfloat16_minnummag bfloat16_minnummag_mipsel +#define bfloat16_maxnummag bfloat16_maxnummag_mipsel +#define bfloat16_sqrt bfloat16_sqrt_mipsel +#define bfloat16_compare bfloat16_compare_mipsel +#define bfloat16_compare_quiet bfloat16_compare_quiet_mipsel +#define bfloat16_silence_nan bfloat16_silence_nan_mipsel +#define bfloat16_default_nan bfloat16_default_nan_mipsel #define bitmap_zero_extend bitmap_zero_extend_mipsel #define bp_wp_matches bp_wp_matches_mipsel #define breakpoint_invalidate breakpoint_invalidate_mipsel diff --git a/qemu/powerpc.h b/qemu/powerpc.h index b7890a3c..61de8961 100644 --- a/qemu/powerpc.h +++ b/qemu/powerpc.h @@ -197,6 +197,24 @@ #define ats_write ats_write_powerpc #define bad_mode_switch bad_mode_switch_powerpc #define bank_number bank_number_powerpc +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_powerpc +#define bfloat16_add bfloat16_add_powerpc +#define bfloat16_sub bfloat16_sub_powerpc +#define bfloat16_mul bfloat16_mul_powerpc +#define bfloat16_div bfloat16_div_powerpc +#define bfloat16_muladd bfloat16_muladd_powerpc +#define bfloat16_scalbn bfloat16_scalbn_powerpc +#define bfloat16_min bfloat16_min_powerpc +#define bfloat16_max bfloat16_max_powerpc +#define bfloat16_minnum bfloat16_minnum_powerpc +#define bfloat16_maxnum bfloat16_maxnum_powerpc +#define bfloat16_minnummag bfloat16_minnummag_powerpc +#define bfloat16_maxnummag bfloat16_maxnummag_powerpc +#define bfloat16_sqrt bfloat16_sqrt_powerpc +#define bfloat16_compare bfloat16_compare_powerpc +#define bfloat16_compare_quiet bfloat16_compare_quiet_powerpc +#define bfloat16_silence_nan bfloat16_silence_nan_powerpc +#define bfloat16_default_nan bfloat16_default_nan_powerpc #define bitmap_zero_extend bitmap_zero_extend_powerpc #define bp_wp_matches bp_wp_matches_powerpc #define breakpoint_invalidate breakpoint_invalidate_powerpc diff --git a/qemu/riscv32.h b/qemu/riscv32.h index 435090bc..a0dc0c57 100644 --- a/qemu/riscv32.h +++ b/qemu/riscv32.h @@ -197,6 +197,24 @@ #define ats_write ats_write_riscv32 #define bad_mode_switch bad_mode_switch_riscv32 #define bank_number bank_number_riscv32 +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_riscv32 +#define bfloat16_add bfloat16_add_riscv32 +#define bfloat16_sub bfloat16_sub_riscv32 +#define bfloat16_mul bfloat16_mul_riscv32 +#define bfloat16_div bfloat16_div_riscv32 +#define bfloat16_muladd bfloat16_muladd_riscv32 +#define bfloat16_scalbn bfloat16_scalbn_riscv32 +#define bfloat16_min bfloat16_min_riscv32 +#define bfloat16_max bfloat16_max_riscv32 +#define bfloat16_minnum bfloat16_minnum_riscv32 +#define bfloat16_maxnum bfloat16_maxnum_riscv32 +#define bfloat16_minnummag bfloat16_minnummag_riscv32 +#define bfloat16_maxnummag bfloat16_maxnummag_riscv32 +#define bfloat16_sqrt bfloat16_sqrt_riscv32 +#define bfloat16_compare bfloat16_compare_riscv32 +#define bfloat16_compare_quiet bfloat16_compare_quiet_riscv32 +#define bfloat16_silence_nan bfloat16_silence_nan_riscv32 +#define bfloat16_default_nan bfloat16_default_nan_riscv32 #define bitmap_zero_extend bitmap_zero_extend_riscv32 #define bp_wp_matches bp_wp_matches_riscv32 #define breakpoint_invalidate breakpoint_invalidate_riscv32 diff --git a/qemu/riscv64.h b/qemu/riscv64.h index ba5af45f..e8bb608d 100644 --- a/qemu/riscv64.h +++ b/qemu/riscv64.h @@ -197,6 +197,24 @@ #define ats_write ats_write_riscv64 #define bad_mode_switch bad_mode_switch_riscv64 #define bank_number bank_number_riscv64 +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_riscv64 +#define bfloat16_add bfloat16_add_riscv64 +#define bfloat16_sub bfloat16_sub_riscv64 +#define bfloat16_mul bfloat16_mul_riscv64 +#define bfloat16_div bfloat16_div_riscv64 +#define bfloat16_muladd bfloat16_muladd_riscv64 +#define bfloat16_scalbn bfloat16_scalbn_riscv64 +#define bfloat16_min bfloat16_min_riscv64 +#define bfloat16_max bfloat16_max_riscv64 +#define bfloat16_minnum bfloat16_minnum_riscv64 +#define bfloat16_maxnum bfloat16_maxnum_riscv64 +#define bfloat16_minnummag bfloat16_minnummag_riscv64 +#define bfloat16_maxnummag bfloat16_maxnummag_riscv64 +#define bfloat16_sqrt bfloat16_sqrt_riscv64 +#define bfloat16_compare bfloat16_compare_riscv64 +#define bfloat16_compare_quiet bfloat16_compare_quiet_riscv64 +#define bfloat16_silence_nan bfloat16_silence_nan_riscv64 +#define bfloat16_default_nan bfloat16_default_nan_riscv64 #define bitmap_zero_extend bitmap_zero_extend_riscv64 #define bp_wp_matches bp_wp_matches_riscv64 #define breakpoint_invalidate breakpoint_invalidate_riscv64 diff --git a/qemu/sparc.h b/qemu/sparc.h index 0211882a..cb39403e 100644 --- a/qemu/sparc.h +++ b/qemu/sparc.h @@ -197,6 +197,24 @@ #define ats_write ats_write_sparc #define bad_mode_switch bad_mode_switch_sparc #define bank_number bank_number_sparc +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_sparc +#define bfloat16_add bfloat16_add_sparc +#define bfloat16_sub bfloat16_sub_sparc +#define bfloat16_mul bfloat16_mul_sparc +#define bfloat16_div bfloat16_div_sparc +#define bfloat16_muladd bfloat16_muladd_sparc +#define bfloat16_scalbn bfloat16_scalbn_sparc +#define bfloat16_min bfloat16_min_sparc +#define bfloat16_max bfloat16_max_sparc +#define bfloat16_minnum bfloat16_minnum_sparc +#define bfloat16_maxnum bfloat16_maxnum_sparc +#define bfloat16_minnummag bfloat16_minnummag_sparc +#define bfloat16_maxnummag bfloat16_maxnummag_sparc +#define bfloat16_sqrt bfloat16_sqrt_sparc +#define bfloat16_compare bfloat16_compare_sparc +#define bfloat16_compare_quiet bfloat16_compare_quiet_sparc +#define bfloat16_silence_nan bfloat16_silence_nan_sparc +#define bfloat16_default_nan bfloat16_default_nan_sparc #define bitmap_zero_extend bitmap_zero_extend_sparc #define bp_wp_matches bp_wp_matches_sparc #define breakpoint_invalidate breakpoint_invalidate_sparc diff --git a/qemu/sparc64.h b/qemu/sparc64.h index 242d85f9..982e3ec5 100644 --- a/qemu/sparc64.h +++ b/qemu/sparc64.h @@ -197,6 +197,24 @@ #define ats_write ats_write_sparc64 #define bad_mode_switch bad_mode_switch_sparc64 #define bank_number bank_number_sparc64 +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_sparc64 +#define bfloat16_add bfloat16_add_sparc64 +#define bfloat16_sub bfloat16_sub_sparc64 +#define bfloat16_mul bfloat16_mul_sparc64 +#define bfloat16_div bfloat16_div_sparc64 +#define bfloat16_muladd bfloat16_muladd_sparc64 +#define bfloat16_scalbn bfloat16_scalbn_sparc64 +#define bfloat16_min bfloat16_min_sparc64 +#define bfloat16_max bfloat16_max_sparc64 +#define bfloat16_minnum bfloat16_minnum_sparc64 +#define bfloat16_maxnum bfloat16_maxnum_sparc64 +#define bfloat16_minnummag bfloat16_minnummag_sparc64 +#define bfloat16_maxnummag bfloat16_maxnummag_sparc64 +#define bfloat16_sqrt bfloat16_sqrt_sparc64 +#define bfloat16_compare bfloat16_compare_sparc64 +#define bfloat16_compare_quiet bfloat16_compare_quiet_sparc64 +#define bfloat16_silence_nan bfloat16_silence_nan_sparc64 +#define bfloat16_default_nan bfloat16_default_nan_sparc64 #define bitmap_zero_extend bitmap_zero_extend_sparc64 #define bp_wp_matches bp_wp_matches_sparc64 #define breakpoint_invalidate breakpoint_invalidate_sparc64 diff --git a/qemu/x86_64.h b/qemu/x86_64.h index 114de5a3..c4247435 100644 --- a/qemu/x86_64.h +++ b/qemu/x86_64.h @@ -197,6 +197,24 @@ #define ats_write ats_write_x86_64 #define bad_mode_switch bad_mode_switch_x86_64 #define bank_number bank_number_x86_64 +#define bfloat16_squash_input_denormal bfloat16_squash_input_denormal_x86_64 +#define bfloat16_add bfloat16_add_x86_64 +#define bfloat16_sub bfloat16_sub_x86_64 +#define bfloat16_mul bfloat16_mul_x86_64 +#define bfloat16_div bfloat16_div_x86_64 +#define bfloat16_muladd bfloat16_muladd_x86_64 +#define bfloat16_scalbn bfloat16_scalbn_x86_64 +#define bfloat16_min bfloat16_min_x86_64 +#define bfloat16_max bfloat16_max_x86_64 +#define bfloat16_minnum bfloat16_minnum_x86_64 +#define bfloat16_maxnum bfloat16_maxnum_x86_64 +#define bfloat16_minnummag bfloat16_minnummag_x86_64 +#define bfloat16_maxnummag bfloat16_maxnummag_x86_64 +#define bfloat16_sqrt bfloat16_sqrt_x86_64 +#define bfloat16_compare bfloat16_compare_x86_64 +#define bfloat16_compare_quiet bfloat16_compare_quiet_x86_64 +#define bfloat16_silence_nan bfloat16_silence_nan_x86_64 +#define bfloat16_default_nan bfloat16_default_nan_x86_64 #define bitmap_zero_extend bitmap_zero_extend_x86_64 #define bp_wp_matches bp_wp_matches_x86_64 #define breakpoint_invalidate breakpoint_invalidate_x86_64