From b29e024f5652d2d17a049232cf9e9d62f041910e Mon Sep 17 00:00:00 2001
From: Lioncash <mathew1800@gmail.com>
Date: Tue, 20 Feb 2018 15:34:21 -0500
Subject: [PATCH] target-arm: Correct bad VBAR patch merge

---
 qemu/target-arm/helper.c | 15 ++++-----------
 1 file changed, 4 insertions(+), 11 deletions(-)

diff --git a/qemu/target-arm/helper.c b/qemu/target-arm/helper.c
index e9b22a15..cf54082b 100644
--- a/qemu/target-arm/helper.c
+++ b/qemu/target-arm/helper.c
@@ -972,6 +972,10 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
     { "PMINTENCLR_EL1", 0,9,14, 3,0,2, ARM_CP_STATE_AA64, ARM_CP_ALIAS,
       PL1_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.c9_pminten), {0, 0},
       NULL, NULL, pmintenclr_write },
+    { "VBAR", 0,12,0, 3,0,0, ARM_CP_STATE_BOTH, 0,
+      PL1_RW, 0, NULL, 0, 0,
+      { offsetof(CPUARMState, cp15.vbar_s), offsetof(CPUARMState, cp15.vbar_ns) },
+      NULL, NULL, vbar_write, },
     { "CCSIDR", 0,0,0, 3,1,0, ARM_CP_STATE_BOTH,
       ARM_CP_NO_RAW, PL1_R, 0, NULL, 0, 0, {0, 0},
       NULL, ccsidr_read, },
@@ -4106,17 +4110,6 @@ void register_cp_regs_for_features(ARMCPU *cpu)
         }
     }
 
-    if (arm_feature(env, ARM_FEATURE_VBAR)) {
-        ARMCPRegInfo vbar_cp_reginfo[] = {
-            { "VBAR", 0,12,0, 3,0,0, ARM_CP_STATE_BOTH,
-              0, PL1_RW, 0, NULL, 0, 0,
-              { offsetof(CPUARMState, cp15.vbar_s), offsetof(CPUARMState, cp15.vbar_ns) },
-              NULL, NULL, vbar_write, },
-            REGINFO_SENTINEL
-        };
-        define_arm_cp_regs(cpu, vbar_cp_reginfo);
-    }
-
     /* Generic registers whose values depend on the implementation */
     {
         ARMCPRegInfo sctlr = {