From b2aa75be33c5031d44eb8897108f8cde0877db90 Mon Sep 17 00:00:00 2001
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Date: Thu, 8 Aug 2019 19:36:30 -0400
Subject: [PATCH] target/mips: Add missing 'break' for a case of MTHC0 handling

This was found by GCC 8.3 static analysis.

Fixes: 5fb2dcd1792

Backports commit ab8c34105a0ddd0c05159fb76919a18de8df4e8f from qemu
---
 qemu/target/mips/translate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/qemu/target/mips/translate.c b/qemu/target/mips/translate.c
index 9ea70119..c6d50a9b 100644
--- a/qemu/target/mips/translate.c
+++ b/qemu/target/mips/translate.c
@@ -6827,6 +6827,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         default:
             goto cp0_unimplemented;
         }
+        break;
     case CP0_REGISTER_17:
         switch (sel) {
         case 0: