diff --git a/qemu/aarch64.h b/qemu/aarch64.h
index ee9d7842..6b27e8cf 100644
--- a/qemu/aarch64.h
+++ b/qemu/aarch64.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_aarch64
 #define float16_mul float16_mul_aarch64
 #define float16_muladd float16_muladd_aarch64
+#define float16_round_to_int float16_round_to_int_aarch64
 #define float16_squash_input_denormal float16_squash_input_denormal_aarch64
 #define float16_sub float16_sub_aarch64
 #define float16_to_float32 float16_to_float32_aarch64
diff --git a/qemu/aarch64eb.h b/qemu/aarch64eb.h
index ab8f6532..d4c0ece4 100644
--- a/qemu/aarch64eb.h
+++ b/qemu/aarch64eb.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_aarch64eb
 #define float16_mul float16_mul_aarch64eb
 #define float16_muladd float16_muladd_aarch64eb
+#define float16_round_to_int float16_round_to_int_aarch64eb
 #define float16_squash_input_denormal float16_squash_input_denormal_aarch64eb
 #define float16_sub float16_sub_aarch64eb
 #define float16_to_float32 float16_to_float32_aarch64eb
diff --git a/qemu/arm.h b/qemu/arm.h
index 2fbd961a..56a33249 100644
--- a/qemu/arm.h
+++ b/qemu/arm.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_arm
 #define float16_mul float16_mul_arm
 #define float16_muladd float16_muladd_arm
+#define float16_round_to_int float16_round_to_int_arm
 #define float16_squash_input_denormal float16_squash_input_denormal_arm
 #define float16_sub float16_sub_arm
 #define float16_to_float32 float16_to_float32_arm
diff --git a/qemu/armeb.h b/qemu/armeb.h
index 5d273ab1..9676e609 100644
--- a/qemu/armeb.h
+++ b/qemu/armeb.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_armeb
 #define float16_mul float16_mul_armeb
 #define float16_muladd float16_muladd_armeb
+#define float16_round_to_int float16_round_to_int_armeb
 #define float16_squash_input_denormal float16_squash_input_denormal_armeb
 #define float16_sub float16_sub_armeb
 #define float16_to_float32 float16_to_float32_armeb
diff --git a/qemu/fpu/softfloat.c b/qemu/fpu/softfloat.c
index 055625c6..f0993cb4 100644
--- a/qemu/fpu/softfloat.c
+++ b/qemu/fpu/softfloat.c
@@ -560,6 +560,25 @@ static bool is_qnan(FloatClass c)
     return c == float_class_qnan;
 }
 
+static FloatParts return_nan(FloatParts a, float_status *s)
+{
+    switch (a.cls) {
+    case float_class_snan:
+        s->float_exception_flags |= float_flag_invalid;
+        a.cls = float_class_msnan;
+        /* fall through */
+    case float_class_qnan:
+        if (s->default_nan_mode) {
+            a.cls = float_class_dnan;
+        }
+        break;
+
+    default:
+        g_assert_not_reached();
+    }
+    return a;
+}
+
 static FloatParts pick_nan(FloatParts a, FloatParts b, float_status *s)
 {
     if (is_snan(a.cls) || is_snan(b.cls)) {
@@ -1176,6 +1195,132 @@ float64 float64_div(float64 a, float64 b, float_status *status)
     return float64_round_pack_canonical(pr, status);
 }
 
+/*
+ * Rounds the floating-point value `a' to an integer, and returns the
+ * result as a floating-point value. The operation is performed
+ * according to the IEC/IEEE Standard for Binary Floating-Point
+ * Arithmetic.
+ */
+
+static FloatParts round_to_int(FloatParts a, int rounding_mode, float_status *s)
+{
+    if (is_nan(a.cls)) {
+        return return_nan(a, s);
+    }
+
+    switch (a.cls) {
+    case float_class_zero:
+    case float_class_inf:
+    case float_class_qnan:
+        /* already "integral" */
+        break;
+    case float_class_normal:
+        if (a.exp >= DECOMPOSED_BINARY_POINT) {
+            /* already integral */
+            break;
+        }
+        if (a.exp < 0) {
+            bool one;
+            /* all fractional */
+            s->float_exception_flags |= float_flag_inexact;
+            switch (rounding_mode) {
+            case float_round_nearest_even:
+                one = a.exp == -1 && a.frac > DECOMPOSED_IMPLICIT_BIT;
+                break;
+            case float_round_ties_away:
+                one = a.exp == -1 && a.frac >= DECOMPOSED_IMPLICIT_BIT;
+                break;
+            case float_round_to_zero:
+                one = false;
+                break;
+            case float_round_up:
+                one = !a.sign;
+                break;
+            case float_round_down:
+                one = a.sign;
+                break;
+            default:
+                g_assert_not_reached();
+            }
+
+            if (one) {
+                a.frac = DECOMPOSED_IMPLICIT_BIT;
+                a.exp = 0;
+            } else {
+                a.cls = float_class_zero;
+            }
+        } else {
+            uint64_t frac_lsb = DECOMPOSED_IMPLICIT_BIT >> a.exp;
+            uint64_t frac_lsbm1 = frac_lsb >> 1;
+            uint64_t rnd_even_mask = (frac_lsb - 1) | frac_lsb;
+            uint64_t rnd_mask = rnd_even_mask >> 1;
+            uint64_t inc;
+
+            switch (rounding_mode) {
+            case float_round_nearest_even:
+                inc = ((a.frac & rnd_even_mask) != frac_lsbm1 ? frac_lsbm1 : 0);
+                break;
+            case float_round_ties_away:
+                inc = frac_lsbm1;
+                break;
+            case float_round_to_zero:
+                inc = 0;
+                break;
+            case float_round_up:
+                inc = a.sign ? 0 : rnd_mask;
+                break;
+            case float_round_down:
+                inc = a.sign ? rnd_mask : 0;
+                break;
+            default:
+                g_assert_not_reached();
+            }
+
+            if (a.frac & rnd_mask) {
+                s->float_exception_flags |= float_flag_inexact;
+                a.frac += inc;
+                a.frac &= ~rnd_mask;
+                if (a.frac & DECOMPOSED_OVERFLOW_BIT) {
+                    a.frac >>= 1;
+                    a.exp++;
+                }
+            }
+        }
+        break;
+    default:
+        g_assert_not_reached();
+    }
+    return a;
+}
+
+float16 float16_round_to_int(float16 a, float_status *s)
+{
+    FloatParts pa = float16_unpack_canonical(a, s);
+    FloatParts pr = round_to_int(pa, s->float_rounding_mode, s);
+    return float16_round_pack_canonical(pr, s);
+}
+
+float32 float32_round_to_int(float32 a, float_status *s)
+{
+    FloatParts pa = float32_unpack_canonical(a, s);
+    FloatParts pr = round_to_int(pa, s->float_rounding_mode, s);
+    return float32_round_pack_canonical(pr, s);
+}
+
+float64 float64_round_to_int(float64 a, float_status *s)
+{
+    FloatParts pa = float64_unpack_canonical(a, s);
+    FloatParts pr = round_to_int(pa, s->float_rounding_mode, s);
+    return float64_round_pack_canonical(pr, s);
+}
+
+float64 float64_trunc_to_int(float64 a, float_status *s)
+{
+    FloatParts pa = float64_unpack_canonical(a, s);
+    FloatParts pr = round_to_int(pa, float_round_to_zero, s);
+    return float64_round_pack_canonical(pr, s);
+}
+
 /*----------------------------------------------------------------------------
 | Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
 | and 7, and returns the properly rounded 32-bit integer corresponding to the
@@ -2877,85 +3022,6 @@ float128 float32_to_float128(float32 a, float_status *status)
 
 }
 
-/*----------------------------------------------------------------------------
-| Rounds the single-precision floating-point value `a' to an integer, and
-| returns the result as a single-precision floating-point value.  The
-| operation is performed according to the IEC/IEEE Standard for Binary
-| Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-float32 float32_round_to_int(float32 a, float_status *status)
-{
-    flag aSign;
-    int aExp;
-    uint32_t lastBitMask, roundBitsMask;
-    uint32_t z;
-    a = float32_squash_input_denormal(a, status);
-
-    aExp = extractFloat32Exp( a );
-    if ( 0x96 <= aExp ) {
-        if ( ( aExp == 0xFF ) && extractFloat32Frac( a ) ) {
-            return propagateFloat32NaN( a, a, status );
-        }
-        return a;
-    }
-    if ( aExp <= 0x7E ) {
-        if ( (uint32_t) ( float32_val(a)<<1 ) == 0 ) return a;
-        status->float_exception_flags |= float_flag_inexact;
-        aSign = extractFloat32Sign( a );
-        switch ( status->float_rounding_mode ) {
-         case float_round_nearest_even:
-            if ( ( aExp == 0x7E ) && extractFloat32Frac( a ) ) {
-                return packFloat32( aSign, 0x7F, 0 );
-            }
-            break;
-        case float_round_ties_away:
-            if (aExp == 0x7E) {
-                return packFloat32(aSign, 0x7F, 0);
-            }
-            break;
-         case float_round_down:
-            return make_float32(aSign ? 0xBF800000 : 0);
-         case float_round_up:
-            return make_float32(aSign ? 0x80000000 : 0x3F800000);
-        }
-        return packFloat32( aSign, 0, 0 );
-    }
-    lastBitMask = 1;
-    lastBitMask <<= 0x96 - aExp;
-    roundBitsMask = lastBitMask - 1;
-    z = float32_val(a);
-    switch (status->float_rounding_mode) {
-    case float_round_nearest_even:
-        z += lastBitMask>>1;
-        if ((z & roundBitsMask) == 0) {
-            z &= ~lastBitMask;
-        }
-        break;
-    case float_round_ties_away:
-        z += lastBitMask >> 1;
-        break;
-    case float_round_to_zero:
-        break;
-    case float_round_up:
-        if (!extractFloat32Sign(make_float32(z))) {
-            z += roundBitsMask;
-        }
-        break;
-    case float_round_down:
-        if (extractFloat32Sign(make_float32(z))) {
-            z += roundBitsMask;
-        }
-        break;
-    default:
-        abort();
-    }
-    z &= ~ roundBitsMask;
-    if ( z != float32_val(a) ) status->float_exception_flags |= float_flag_inexact;
-    return make_float32(z);
-
-}
-
 /*----------------------------------------------------------------------------
 | Returns the remainder of the single-precision floating-point value `a'
 | with respect to the corresponding value `b'.  The operation is performed
@@ -4098,99 +4164,6 @@ float128 float64_to_float128(float64 a, float_status *status)
 
 }
 
-/*----------------------------------------------------------------------------
-| Rounds the double-precision floating-point value `a' to an integer, and
-| returns the result as a double-precision floating-point value.  The
-| operation is performed according to the IEC/IEEE Standard for Binary
-| Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-float64 float64_round_to_int(float64 a, float_status *status)
-{
-    flag aSign;
-    int aExp;
-    uint64_t lastBitMask, roundBitsMask;
-    uint64_t z;
-    a = float64_squash_input_denormal(a, status);
-
-    aExp = extractFloat64Exp( a );
-    if ( 0x433 <= aExp ) {
-        if ( ( aExp == 0x7FF ) && extractFloat64Frac( a ) ) {
-            return propagateFloat64NaN( a, a, status );
-        }
-        return a;
-    }
-    if ( aExp < 0x3FF ) {
-        if ( (uint64_t) ( float64_val(a)<<1 ) == 0 ) return a;
-        status->float_exception_flags |= float_flag_inexact;
-        aSign = extractFloat64Sign( a );
-        switch ( status->float_rounding_mode ) {
-         case float_round_nearest_even:
-            if ( ( aExp == 0x3FE ) && extractFloat64Frac( a ) ) {
-                return packFloat64( aSign, 0x3FF, 0 );
-            }
-            break;
-        case float_round_ties_away:
-            if (aExp == 0x3FE) {
-                return packFloat64(aSign, 0x3ff, 0);
-            }
-            break;
-         case float_round_down:
-            return make_float64(aSign ? LIT64( 0xBFF0000000000000 ) : 0);
-         case float_round_up:
-            return make_float64(
-            aSign ? LIT64( 0x8000000000000000 ) : LIT64( 0x3FF0000000000000 ));
-        }
-        return packFloat64( aSign, 0, 0 );
-    }
-    lastBitMask = 1;
-    lastBitMask <<= 0x433 - aExp;
-    roundBitsMask = lastBitMask - 1;
-    z = float64_val(a);
-    switch (status->float_rounding_mode) {
-    case float_round_nearest_even:
-        z += lastBitMask >> 1;
-        if ((z & roundBitsMask) == 0) {
-            z &= ~lastBitMask;
-        }
-        break;
-    case float_round_ties_away:
-        z += lastBitMask >> 1;
-        break;
-    case float_round_to_zero:
-        break;
-    case float_round_up:
-        if (!extractFloat64Sign(make_float64(z))) {
-            z += roundBitsMask;
-        }
-        break;
-    case float_round_down:
-        if (extractFloat64Sign(make_float64(z))) {
-            z += roundBitsMask;
-        }
-        break;
-    default:
-        abort();
-    }
-    z &= ~ roundBitsMask;
-    if ( z != float64_val(a) ) {
-        status->float_exception_flags |= float_flag_inexact;
-    }
-    return make_float64(z);
-
-}
-
-float64 float64_trunc_to_int(float64 a, float_status *status)
-{
-    int oldmode;
-    float64 res;
-    oldmode = status->float_rounding_mode;
-    status->float_rounding_mode = float_round_to_zero;
-    res = float64_round_to_int(a, status);
-    status->float_rounding_mode = oldmode;
-    return res;
-}
-
 /*----------------------------------------------------------------------------
 | Returns the remainder of the double-precision floating-point value `a'
 | with respect to the corresponding value `b'.  The operation is performed
diff --git a/qemu/header_gen.py b/qemu/header_gen.py
index 56293171..9d5eb783 100644
--- a/qemu/header_gen.py
+++ b/qemu/header_gen.py
@@ -501,6 +501,7 @@ symbols = (
     'float16_maybe_silence_nan',
     'float16_mul',
     'float16_muladd',
+    'float16_round_to_int',
     'float16_squash_input_denormal',
     'float16_sub',
     'float16_to_float32',
diff --git a/qemu/include/fpu/softfloat.h b/qemu/include/fpu/softfloat.h
index c6ac433f..221573cd 100644
--- a/qemu/include/fpu/softfloat.h
+++ b/qemu/include/fpu/softfloat.h
@@ -244,6 +244,7 @@ float64 float16_to_float64(float16 a, flag ieee, float_status *status);
 | Software half-precision operations.
 *----------------------------------------------------------------------------*/
 
+float16 float16_round_to_int(float16, float_status *status);
 float16 float16_add(float16, float16, float_status *status);
 float16 float16_sub(float16, float16, float_status *status);
 float16 float16_mul(float16, float16, float_status *status);
diff --git a/qemu/m68k.h b/qemu/m68k.h
index 54c29dd7..f0482405 100644
--- a/qemu/m68k.h
+++ b/qemu/m68k.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_m68k
 #define float16_mul float16_mul_m68k
 #define float16_muladd float16_muladd_m68k
+#define float16_round_to_int float16_round_to_int_m68k
 #define float16_squash_input_denormal float16_squash_input_denormal_m68k
 #define float16_sub float16_sub_m68k
 #define float16_to_float32 float16_to_float32_m68k
diff --git a/qemu/mips.h b/qemu/mips.h
index 5d4b770c..c9fce09f 100644
--- a/qemu/mips.h
+++ b/qemu/mips.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_mips
 #define float16_mul float16_mul_mips
 #define float16_muladd float16_muladd_mips
+#define float16_round_to_int float16_round_to_int_mips
 #define float16_squash_input_denormal float16_squash_input_denormal_mips
 #define float16_sub float16_sub_mips
 #define float16_to_float32 float16_to_float32_mips
diff --git a/qemu/mips64.h b/qemu/mips64.h
index 97167880..ca056e8f 100644
--- a/qemu/mips64.h
+++ b/qemu/mips64.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_mips64
 #define float16_mul float16_mul_mips64
 #define float16_muladd float16_muladd_mips64
+#define float16_round_to_int float16_round_to_int_mips64
 #define float16_squash_input_denormal float16_squash_input_denormal_mips64
 #define float16_sub float16_sub_mips64
 #define float16_to_float32 float16_to_float32_mips64
diff --git a/qemu/mips64el.h b/qemu/mips64el.h
index 28f37904..01322a02 100644
--- a/qemu/mips64el.h
+++ b/qemu/mips64el.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_mips64el
 #define float16_mul float16_mul_mips64el
 #define float16_muladd float16_muladd_mips64el
+#define float16_round_to_int float16_round_to_int_mips64el
 #define float16_squash_input_denormal float16_squash_input_denormal_mips64el
 #define float16_sub float16_sub_mips64el
 #define float16_to_float32 float16_to_float32_mips64el
diff --git a/qemu/mipsel.h b/qemu/mipsel.h
index 630998c8..24f20828 100644
--- a/qemu/mipsel.h
+++ b/qemu/mipsel.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_mipsel
 #define float16_mul float16_mul_mipsel
 #define float16_muladd float16_muladd_mipsel
+#define float16_round_to_int float16_round_to_int_mipsel
 #define float16_squash_input_denormal float16_squash_input_denormal_mipsel
 #define float16_sub float16_sub_mipsel
 #define float16_to_float32 float16_to_float32_mipsel
diff --git a/qemu/powerpc.h b/qemu/powerpc.h
index 52256276..5d5133b5 100644
--- a/qemu/powerpc.h
+++ b/qemu/powerpc.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_powerpc
 #define float16_mul float16_mul_powerpc
 #define float16_muladd float16_muladd_powerpc
+#define float16_round_to_int float16_round_to_int_powerpc
 #define float16_squash_input_denormal float16_squash_input_denormal_powerpc
 #define float16_sub float16_sub_powerpc
 #define float16_to_float32 float16_to_float32_powerpc
diff --git a/qemu/sparc.h b/qemu/sparc.h
index be4c6971..ff9fc988 100644
--- a/qemu/sparc.h
+++ b/qemu/sparc.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_sparc
 #define float16_mul float16_mul_sparc
 #define float16_muladd float16_muladd_sparc
+#define float16_round_to_int float16_round_to_int_sparc
 #define float16_squash_input_denormal float16_squash_input_denormal_sparc
 #define float16_sub float16_sub_sparc
 #define float16_to_float32 float16_to_float32_sparc
diff --git a/qemu/sparc64.h b/qemu/sparc64.h
index 7bc0d2fe..eb46ce1b 100644
--- a/qemu/sparc64.h
+++ b/qemu/sparc64.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_sparc64
 #define float16_mul float16_mul_sparc64
 #define float16_muladd float16_muladd_sparc64
+#define float16_round_to_int float16_round_to_int_sparc64
 #define float16_squash_input_denormal float16_squash_input_denormal_sparc64
 #define float16_sub float16_sub_sparc64
 #define float16_to_float32 float16_to_float32_sparc64
diff --git a/qemu/x86_64.h b/qemu/x86_64.h
index 217d8109..e8b7c025 100644
--- a/qemu/x86_64.h
+++ b/qemu/x86_64.h
@@ -495,6 +495,7 @@
 #define float16_maybe_silence_nan float16_maybe_silence_nan_x86_64
 #define float16_mul float16_mul_x86_64
 #define float16_muladd float16_muladd_x86_64
+#define float16_round_to_int float16_round_to_int_x86_64
 #define float16_squash_input_denormal float16_squash_input_denormal_x86_64
 #define float16_sub float16_sub_x86_64
 #define float16_to_float32 float16_to_float32_x86_64