From b8caaac110b87f03d173d69ad17dc5e744fb2c93 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= Date: Fri, 2 Mar 2018 12:50:27 -0500 Subject: [PATCH] target/arm/helper: make it clear the EC field is also in hex ..just like the rest of the displayed ESR register. Otherwise people might scratch their heads if a not obviously hex number is displayed for the EC field. Backports commit 6568da459b611845ef55526cd23afc9fa9f4647f from qemu --- qemu/target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index a1fecfd5..dc931762 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -5982,7 +5982,7 @@ void arm_cpu_do_interrupt(CPUState *cs) new_el); if (qemu_loglevel_mask(CPU_LOG_INT) && !excp_is_internal(cs->exception_index)) { - qemu_log_mask(CPU_LOG_INT, "...with ESR %x/0x%" PRIx32 "\n", + qemu_log_mask(CPU_LOG_INT, "...with ESR 0x%x/0x%" PRIx32 "\n", env->exception.syndrome >> ARM_EL_EC_SHIFT, env->exception.syndrome); }