From c095dc9e834ce25e99aa345541b757999dc20485 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 8 Mar 2018 09:08:53 -0500 Subject: [PATCH] target/arm: Suppress TB end for FPCR/FPSR Nothing in either register affects the TB. Backports commit b916c9c35ce8158bf7f9ed5514eb279e52875de2 from qemu --- qemu/target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index 947ec79f..f6c1e5bb 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -3064,10 +3064,10 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { { "DAIF", 0,4,2, 3,3,1, ARM_CP_STATE_AA64, ARM_CP_NO_RAW, PL0_RW, 0, NULL, 0, offsetof(CPUARMState, daif), {0, 0}, aa64_daif_access, NULL, aa64_daif_write, NULL,NULL, arm_cp_reset_ignore }, - { "FPCR", 0,4,4, 3,3,0, ARM_CP_STATE_AA64, ARM_CP_FPU, + { "FPCR", 0,4,4, 3,3,0, ARM_CP_STATE_AA64, ARM_CP_FPU | ARM_CP_SUPPRESS_TB_END, PL0_RW, 0, NULL, 0, 0, {0, 0}, NULL, aa64_fpcr_read, aa64_fpcr_write }, - { "FPSR", 0,4,4, 3,3,1, ARM_CP_STATE_AA64, ARM_CP_FPU, + { "FPSR", 0,4,4, 3,3,1, ARM_CP_STATE_AA64, ARM_CP_FPU | ARM_CP_SUPPRESS_TB_END, PL0_RW, 0, NULL, 0, 0, {0, 0}, NULL, aa64_fpsr_read, aa64_fpsr_write }, { "DCZID_EL0", 0,0,0, 3,3,7, ARM_CP_STATE_AA64,