diff --git a/qemu/aarch64.h b/qemu/aarch64.h index 15b1d40f..65497d80 100644 --- a/qemu/aarch64.h +++ b/qemu/aarch64.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_aarch64 #define tcg_gen_gvec_ors tcg_gen_gvec_ors_aarch64 #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_aarch64 +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_aarch64 #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_aarch64 #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_aarch64 #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_aarch64 @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_aarch64 #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_aarch64 #define tcg_gen_rotli_vec tcg_gen_rotli_vec_aarch64 +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_aarch64 #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_aarch64 #define tcg_gen_rotri_vec tcg_gen_rotri_vec_aarch64 #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_aarch64 diff --git a/qemu/aarch64eb.h b/qemu/aarch64eb.h index 62f6502d..1301a785 100644 --- a/qemu/aarch64eb.h +++ b/qemu/aarch64eb.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_aarch64eb #define tcg_gen_gvec_ors tcg_gen_gvec_ors_aarch64eb #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_aarch64eb +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_aarch64eb #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_aarch64eb #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_aarch64eb #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_aarch64eb @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_aarch64eb #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_aarch64eb #define tcg_gen_rotli_vec tcg_gen_rotli_vec_aarch64eb +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_aarch64eb #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_aarch64eb #define tcg_gen_rotri_vec tcg_gen_rotri_vec_aarch64eb #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_aarch64eb diff --git a/qemu/arm.h b/qemu/arm.h index 5bf2f055..ffbf1c68 100644 --- a/qemu/arm.h +++ b/qemu/arm.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_arm #define tcg_gen_gvec_ors tcg_gen_gvec_ors_arm #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_arm +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_arm #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_arm #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_arm #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_arm @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_arm #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_arm #define tcg_gen_rotli_vec tcg_gen_rotli_vec_arm +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_arm #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_arm #define tcg_gen_rotri_vec tcg_gen_rotri_vec_arm #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_arm diff --git a/qemu/armeb.h b/qemu/armeb.h index d2080cc3..d1102c62 100644 --- a/qemu/armeb.h +++ b/qemu/armeb.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_armeb #define tcg_gen_gvec_ors tcg_gen_gvec_ors_armeb #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_armeb +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_armeb #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_armeb #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_armeb #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_armeb @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_armeb #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_armeb #define tcg_gen_rotli_vec tcg_gen_rotli_vec_armeb +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_armeb #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_armeb #define tcg_gen_rotri_vec tcg_gen_rotri_vec_armeb #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_armeb diff --git a/qemu/header_gen.py b/qemu/header_gen.py index c962309c..3b5095d6 100644 --- a/qemu/header_gen.py +++ b/qemu/header_gen.py @@ -2923,6 +2923,7 @@ symbols = ( 'tcg_gen_gvec_ori', 'tcg_gen_gvec_ors', 'tcg_gen_gvec_rotli', + 'tcg_gen_gvec_rotls', 'tcg_gen_gvec_rotri', 'tcg_gen_gvec_rotlv', 'tcg_gen_gvec_rotrv', @@ -3050,6 +3051,7 @@ symbols = ( 'tcg_gen_rotli_i32', 'tcg_gen_rotli_i64', 'tcg_gen_rotli_vec', + 'tcg_gen_rotls_vec', 'tcg_gen_rotlv_vec', 'tcg_gen_rotri_vec', 'tcg_gen_rotrv_vec', diff --git a/qemu/m68k.h b/qemu/m68k.h index 92be9023..4448b1bd 100644 --- a/qemu/m68k.h +++ b/qemu/m68k.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_m68k #define tcg_gen_gvec_ors tcg_gen_gvec_ors_m68k #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_m68k +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_m68k #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_m68k #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_m68k #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_m68k @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_m68k #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_m68k #define tcg_gen_rotli_vec tcg_gen_rotli_vec_m68k +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_m68k #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_m68k #define tcg_gen_rotri_vec tcg_gen_rotri_vec_m68k #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_m68k diff --git a/qemu/mips.h b/qemu/mips.h index 39a840ef..42ad95bf 100644 --- a/qemu/mips.h +++ b/qemu/mips.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_mips #define tcg_gen_gvec_ors tcg_gen_gvec_ors_mips #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_mips +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_mips #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_mips #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_mips #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_mips @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_mips #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_mips #define tcg_gen_rotli_vec tcg_gen_rotli_vec_mips +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_mips #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_mips #define tcg_gen_rotri_vec tcg_gen_rotri_vec_mips #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_mips diff --git a/qemu/mips64.h b/qemu/mips64.h index 1188d368..ea2e2259 100644 --- a/qemu/mips64.h +++ b/qemu/mips64.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_mips64 #define tcg_gen_gvec_ors tcg_gen_gvec_ors_mips64 #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_mips64 +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_mips64 #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_mips64 #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_mips64 #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_mips64 @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_mips64 #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_mips64 #define tcg_gen_rotli_vec tcg_gen_rotli_vec_mips64 +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_mips64 #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_mips64 #define tcg_gen_rotri_vec tcg_gen_rotri_vec_mips64 #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_mips64 diff --git a/qemu/mips64el.h b/qemu/mips64el.h index 325fc644..0078b588 100644 --- a/qemu/mips64el.h +++ b/qemu/mips64el.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_mips64el #define tcg_gen_gvec_ors tcg_gen_gvec_ors_mips64el #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_mips64el +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_mips64el #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_mips64el #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_mips64el #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_mips64el @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_mips64el #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_mips64el #define tcg_gen_rotli_vec tcg_gen_rotli_vec_mips64el +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_mips64el #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_mips64el #define tcg_gen_rotri_vec tcg_gen_rotri_vec_mips64el #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_mips64el diff --git a/qemu/mipsel.h b/qemu/mipsel.h index d339cfac..2e77193b 100644 --- a/qemu/mipsel.h +++ b/qemu/mipsel.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_mipsel #define tcg_gen_gvec_ors tcg_gen_gvec_ors_mipsel #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_mipsel +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_mipsel #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_mipsel #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_mipsel #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_mipsel @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_mipsel #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_mipsel #define tcg_gen_rotli_vec tcg_gen_rotli_vec_mipsel +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_mipsel #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_mipsel #define tcg_gen_rotri_vec tcg_gen_rotri_vec_mipsel #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_mipsel diff --git a/qemu/powerpc.h b/qemu/powerpc.h index d51feb07..9130cb8d 100644 --- a/qemu/powerpc.h +++ b/qemu/powerpc.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_powerpc #define tcg_gen_gvec_ors tcg_gen_gvec_ors_powerpc #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_powerpc +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_powerpc #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_powerpc #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_powerpc #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_powerpc @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_powerpc #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_powerpc #define tcg_gen_rotli_vec tcg_gen_rotli_vec_powerpc +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_powerpc #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_powerpc #define tcg_gen_rotri_vec tcg_gen_rotri_vec_powerpc #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_powerpc diff --git a/qemu/riscv32.h b/qemu/riscv32.h index cf247d42..f8f2a943 100644 --- a/qemu/riscv32.h +++ b/qemu/riscv32.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_riscv32 #define tcg_gen_gvec_ors tcg_gen_gvec_ors_riscv32 #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_riscv32 +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_riscv32 #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_riscv32 #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_riscv32 #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_riscv32 @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_riscv32 #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_riscv32 #define tcg_gen_rotli_vec tcg_gen_rotli_vec_riscv32 +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_riscv32 #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_riscv32 #define tcg_gen_rotri_vec tcg_gen_rotri_vec_riscv32 #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_riscv32 diff --git a/qemu/riscv64.h b/qemu/riscv64.h index e29c2282..c8d9c94f 100644 --- a/qemu/riscv64.h +++ b/qemu/riscv64.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_riscv64 #define tcg_gen_gvec_ors tcg_gen_gvec_ors_riscv64 #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_riscv64 +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_riscv64 #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_riscv64 #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_riscv64 #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_riscv64 @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_riscv64 #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_riscv64 #define tcg_gen_rotli_vec tcg_gen_rotli_vec_riscv64 +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_riscv64 #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_riscv64 #define tcg_gen_rotri_vec tcg_gen_rotri_vec_riscv64 #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_riscv64 diff --git a/qemu/sparc.h b/qemu/sparc.h index add85e0e..384df6b3 100644 --- a/qemu/sparc.h +++ b/qemu/sparc.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_sparc #define tcg_gen_gvec_ors tcg_gen_gvec_ors_sparc #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_sparc +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_sparc #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_sparc #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_sparc #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_sparc @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_sparc #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_sparc #define tcg_gen_rotli_vec tcg_gen_rotli_vec_sparc +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_sparc #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_sparc #define tcg_gen_rotri_vec tcg_gen_rotri_vec_sparc #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_sparc diff --git a/qemu/sparc64.h b/qemu/sparc64.h index e397d29d..5691aab6 100644 --- a/qemu/sparc64.h +++ b/qemu/sparc64.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_sparc64 #define tcg_gen_gvec_ors tcg_gen_gvec_ors_sparc64 #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_sparc64 +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_sparc64 #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_sparc64 #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_sparc64 #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_sparc64 @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_sparc64 #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_sparc64 #define tcg_gen_rotli_vec tcg_gen_rotli_vec_sparc64 +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_sparc64 #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_sparc64 #define tcg_gen_rotri_vec tcg_gen_rotri_vec_sparc64 #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_sparc64 diff --git a/qemu/tcg/aarch64/tcg-target.h b/qemu/tcg/aarch64/tcg-target.h index a5477bbc..9bc2a5ec 100644 --- a/qemu/tcg/aarch64/tcg-target.h +++ b/qemu/tcg/aarch64/tcg-target.h @@ -134,6 +134,7 @@ typedef enum { #define TCG_TARGET_HAS_neg_vec 1 #define TCG_TARGET_HAS_abs_vec 1 #define TCG_TARGET_HAS_roti_vec 0 +#define TCG_TARGET_HAS_rots_vec 0 #define TCG_TARGET_HAS_rotv_vec 0 #define TCG_TARGET_HAS_shi_vec 1 #define TCG_TARGET_HAS_shs_vec 0 diff --git a/qemu/tcg/i386/tcg-target.h b/qemu/tcg/i386/tcg-target.h index 8481b1c7..89cbfc52 100644 --- a/qemu/tcg/i386/tcg-target.h +++ b/qemu/tcg/i386/tcg-target.h @@ -217,6 +217,7 @@ extern bool have_avx2; #define TCG_TARGET_HAS_neg_vec 0 #define TCG_TARGET_HAS_abs_vec 1 #define TCG_TARGET_HAS_roti_vec 0 +#define TCG_TARGET_HAS_rots_vec 0 #define TCG_TARGET_HAS_rotv_vec 0 #define TCG_TARGET_HAS_shi_vec 1 #define TCG_TARGET_HAS_shs_vec 1 diff --git a/qemu/tcg/tcg-op-gvec.c b/qemu/tcg/tcg-op-gvec.c index 7f814d1b..1fca16aa 100644 --- a/qemu/tcg/tcg-op-gvec.c +++ b/qemu/tcg/tcg-op-gvec.c @@ -2977,6 +2977,28 @@ void tcg_gen_gvec_sars(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aof do_gvec_shifts(s, vece, dofs, aofs, shift, oprsz, maxsz, &g); } +void tcg_gen_gvec_rotls(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz) +{ + static const GVecGen2sh g = { + .fni4 = tcg_gen_rotl_i32, + .fni8 = tcg_gen_rotl_i64, + .fniv_s = tcg_gen_rotls_vec, + .fniv_v = tcg_gen_rotlv_vec, + .fno = { + gen_helper_gvec_rotl8i, + gen_helper_gvec_rotl16i, + gen_helper_gvec_rotl32i, + gen_helper_gvec_rotl64i, + }, + .s_list = { INDEX_op_rotls_vec, 0 }, + .v_list = { INDEX_op_rotlv_vec, 0 }, + }; + + tcg_debug_assert(vece <= MO_64); + do_gvec_shifts(s, vece, dofs, aofs, shift, oprsz, maxsz, &g); +} + /* * Expand D = A << (B % element bits) * diff --git a/qemu/tcg/tcg-op-gvec.h b/qemu/tcg/tcg-op-gvec.h index f1ea724f..9387feec 100644 --- a/qemu/tcg/tcg-op-gvec.h +++ b/qemu/tcg/tcg-op-gvec.h @@ -345,6 +345,8 @@ void tcg_gen_gvec_shrs(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aof TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); void tcg_gen_gvec_sars(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_rotls(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); /* * Perform vector shift by vector element, modulo the element size. diff --git a/qemu/tcg/tcg-op-vec.c b/qemu/tcg/tcg-op-vec.c index b5433611..e4b75e28 100644 --- a/qemu/tcg/tcg-op-vec.c +++ b/qemu/tcg/tcg-op-vec.c @@ -749,6 +749,11 @@ void tcg_gen_sars_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv do_shifts(s, vece, r, a, b, INDEX_op_sars_vec); } +void tcg_gen_rotls_vec(TCGContext *tcg_ctx, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s) +{ + do_shifts(tcg_ctx, vece, r, a, s, INDEX_op_rotls_vec); +} + void tcg_gen_bitsel_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b, TCGv_vec c) { diff --git a/qemu/tcg/tcg-op.h b/qemu/tcg/tcg-op.h index 84bdabbe..95b19a33 100644 --- a/qemu/tcg/tcg-op.h +++ b/qemu/tcg/tcg-op.h @@ -1007,6 +1007,7 @@ void tcg_gen_rotri_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, int void tcg_gen_shls_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s); void tcg_gen_shrs_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s); void tcg_gen_sars_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s); +void tcg_gen_rotls_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s); void tcg_gen_shlv_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s); void tcg_gen_shrv_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s); diff --git a/qemu/tcg/tcg-opc.h b/qemu/tcg/tcg-opc.h index 4eeb5129..16b20812 100644 --- a/qemu/tcg/tcg-opc.h +++ b/qemu/tcg/tcg-opc.h @@ -250,6 +250,7 @@ DEF(rotli_vec, 1, 1, 1, IMPLVEC | IMPL(TCG_TARGET_HAS_roti_vec)) DEF(shls_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shs_vec)) DEF(shrs_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shs_vec)) DEF(sars_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shs_vec)) +DEF(rotls_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_rots_vec)) DEF(shlv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shv_vec)) DEF(shrv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shv_vec)) diff --git a/qemu/tcg/tcg.c b/qemu/tcg/tcg.c index 1f4087fd..e79f8182 100644 --- a/qemu/tcg/tcg.c +++ b/qemu/tcg/tcg.c @@ -1080,6 +1080,8 @@ bool tcg_op_supported(TCGOpcode op) return have_vec && TCG_TARGET_HAS_shv_vec; case INDEX_op_rotli_vec: return have_vec && TCG_TARGET_HAS_roti_vec; + case INDEX_op_rotls_vec: + return have_vec && TCG_TARGET_HAS_rots_vec; case INDEX_op_rotlv_vec: case INDEX_op_rotrv_vec: return have_vec && TCG_TARGET_HAS_rotv_vec; diff --git a/qemu/tcg/tcg.h b/qemu/tcg/tcg.h index 24cbeffa..f321465c 100644 --- a/qemu/tcg/tcg.h +++ b/qemu/tcg/tcg.h @@ -186,6 +186,7 @@ typedef uint64_t TCGRegSet; #define TCG_TARGET_HAS_andc_vec 0 #define TCG_TARGET_HAS_orc_vec 0 #define TCG_TARGET_HAS_roti_vec 0 +#define TCG_TARGET_HAS_rots_vec 0 #define TCG_TARGET_HAS_rotv_vec 0 #define TCG_TARGET_HAS_shi_vec 0 #define TCG_TARGET_HAS_shs_vec 0 @@ -1093,7 +1094,7 @@ static inline TCGv_ptr tcg_temp_local_new_ptr(TCGContext *s) } // UNICORN: Added -#define TCG_OP_DEFS_TABLE_SIZE 188 +#define TCG_OP_DEFS_TABLE_SIZE 189 extern const TCGOpDef tcg_op_defs_org[TCG_OP_DEFS_TABLE_SIZE]; typedef struct TCGTargetOpDef { diff --git a/qemu/x86_64.h b/qemu/x86_64.h index 937ae0e4..d73c4a73 100644 --- a/qemu/x86_64.h +++ b/qemu/x86_64.h @@ -2917,6 +2917,7 @@ #define tcg_gen_gvec_ori tcg_gen_gvec_ori_x86_64 #define tcg_gen_gvec_ors tcg_gen_gvec_ors_x86_64 #define tcg_gen_gvec_rotli tcg_gen_gvec_rotli_x86_64 +#define tcg_gen_gvec_rotls tcg_gen_gvec_rotls_x86_64 #define tcg_gen_gvec_rotri tcg_gen_gvec_rotri_x86_64 #define tcg_gen_gvec_rotlv tcg_gen_gvec_rotlv_x86_64 #define tcg_gen_gvec_rotrv tcg_gen_gvec_rotrv_x86_64 @@ -3044,6 +3045,7 @@ #define tcg_gen_rotli_i32 tcg_gen_rotli_i32_x86_64 #define tcg_gen_rotli_i64 tcg_gen_rotli_i64_x86_64 #define tcg_gen_rotli_vec tcg_gen_rotli_vec_x86_64 +#define tcg_gen_rotls_vec tcg_gen_rotls_vec_x86_64 #define tcg_gen_rotlv_vec tcg_gen_rotlv_vec_x86_64 #define tcg_gen_rotri_vec tcg_gen_rotri_vec_x86_64 #define tcg_gen_rotrv_vec tcg_gen_rotrv_vec_x86_64