From ce9dca9c5ed65f17468390bca105b40d62e0162f Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 1 Mar 2018 09:34:27 -0500 Subject: [PATCH] target-arm: Fix aarch64 disas_ldst_single_struct We add s->be_data within do_vec_ld/st. Adding it here means that we have the wrong bits set in SIZE for a big-endian host, leading to g_assert_not_reached in write_vec_element and read_vec_element. Backports commit 74b13f92c2428abae41a61c46a5cf47545da5fcb from qemu --- qemu/target-arm/translate-a64.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qemu/target-arm/translate-a64.c b/qemu/target-arm/translate-a64.c index dfbd111e..9e7e4ce8 100644 --- a/qemu/target-arm/translate-a64.c +++ b/qemu/target-arm/translate-a64.c @@ -2886,9 +2886,9 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn) } else { /* Load/store one element per register */ if (is_load) { - do_vec_ld(s, rt, index, tcg_addr, s->be_data + scale); + do_vec_ld(s, rt, index, tcg_addr, scale); } else { - do_vec_st(s, rt, index, tcg_addr, s->be_data + scale); + do_vec_st(s, rt, index, tcg_addr, scale); } } tcg_gen_addi_i64(tcg_ctx, tcg_addr, tcg_addr, ebytes);