diff --git a/qemu/tcg/aarch64/tcg-target.c b/qemu/tcg/aarch64/tcg-target.c
index 987c0bd4..6e0172fb 100644
--- a/qemu/tcg/aarch64/tcg-target.c
+++ b/qemu/tcg/aarch64/tcg-target.c
@@ -1718,10 +1718,10 @@ static const TCGTargetOpDef aarch64_op_defs[] = {
 
 static void tcg_target_init(TCGContext *s)
 {
-    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
-    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
+    tcg_regset_set32(s->tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
+    tcg_regset_set32(s->tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
 
-    tcg_regset_set32(tcg_target_call_clobber_regs, 0,
+    tcg_regset_set32(s->tcg_target_call_clobber_regs, 0,
                      (1 << TCG_REG_X0) | (1 << TCG_REG_X1) |
                      (1 << TCG_REG_X2) | (1 << TCG_REG_X3) |
                      (1 << TCG_REG_X4) | (1 << TCG_REG_X5) |
@@ -1739,7 +1739,7 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_X18); /* platform register */
 
-    tcg_add_target_add_op_defs(aarch64_op_defs);
+    tcg_add_target_add_op_defs(s, aarch64_op_defs);
 }
 
 /* Saving pairs: (X19, X20) .. (X27, X28), (X29(fp), X30(lr)).  */
diff --git a/qemu/tcg/arm/tcg-target.c b/qemu/tcg/arm/tcg-target.c
index e40301c7..1851a99f 100644
--- a/qemu/tcg/arm/tcg-target.c
+++ b/qemu/tcg/arm/tcg-target.c
@@ -1994,8 +1994,8 @@ static void tcg_target_init(TCGContext *s)
         }
     }
 
-    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);
-    tcg_regset_set32(tcg_target_call_clobber_regs, 0,
+    tcg_regset_set32(s->tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);
+    tcg_regset_set32(s->tcg_target_call_clobber_regs, 0,
                      (1 << TCG_REG_R0) |
                      (1 << TCG_REG_R1) |
                      (1 << TCG_REG_R2) |
@@ -2008,7 +2008,7 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_PC);
 
-    tcg_add_target_add_op_defs(arm_op_defs);
+    tcg_add_target_add_op_defs(s, arm_op_defs);
 }
 
 static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
diff --git a/qemu/tcg/ia64/tcg-target.c b/qemu/tcg/ia64/tcg-target.c
index 6bc99246..a7a681c7 100644
--- a/qemu/tcg/ia64/tcg-target.c
+++ b/qemu/tcg/ia64/tcg-target.c
@@ -2386,42 +2386,42 @@ static void tcg_target_qemu_prologue(TCGContext *s)
 
 static void tcg_target_init(TCGContext *s)
 {
-    tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32],
+    tcg_regset_set(s->tcg_target_available_regs[TCG_TYPE_I32],
                    0xffffffffffffffffull);
-    tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I64],
+    tcg_regset_set(s->tcg_target_available_regs[TCG_TYPE_I64],
                    0xffffffffffffffffull);
 
-    tcg_regset_clear(tcg_target_call_clobber_regs);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R8);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R9);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R10);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R11);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R14);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R15);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R16);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R17);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R18);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R19);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R20);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R21);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R22);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R23);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R24);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R25);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R26);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R27);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R28);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R29);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R30);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R31);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R56);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R57);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R58);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R59);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R60);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R61);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R62);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R63);
+    tcg_regset_clear(s->tcg_target_call_clobber_regs);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R8);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R9);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R10);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R11);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R14);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R15);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R16);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R17);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R18);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R19);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R20);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R21);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R22);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R23);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R24);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R25);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R26);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R27);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R28);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R29);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R30);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R31);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R56);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R57);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R58);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R59);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R60);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R61);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R62);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R63);
 
     tcg_regset_clear(s->reserved_regs);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);   /* zero register */
@@ -2442,5 +2442,5 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R6);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R7);
 
-    tcg_add_target_add_op_defs(ia64_op_defs);
+    tcg_add_target_add_op_defs(s, ia64_op_defs);
 }
diff --git a/qemu/tcg/mips/tcg-target.c b/qemu/tcg/mips/tcg-target.c
index b7f4d674..0adf88fc 100644
--- a/qemu/tcg/mips/tcg-target.c
+++ b/qemu/tcg/mips/tcg-target.c
@@ -1776,8 +1776,8 @@ static void tcg_target_qemu_prologue(TCGContext *s)
 static void tcg_target_init(TCGContext *s)
 {
     tcg_target_detect_isa();
-    tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32], 0xffffffff);
-    tcg_regset_set(tcg_target_call_clobber_regs,
+    tcg_regset_set(s->tcg_target_available_regs[TCG_TYPE_I32], 0xffffffff);
+    tcg_regset_set(s->tcg_target_call_clobber_regs,
                    (1 << TCG_REG_V0) |
                    (1 << TCG_REG_V1) |
                    (1 << TCG_REG_A0) |
@@ -1805,7 +1805,7 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);   /* stack pointer */
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_GP);   /* global pointer */
 
-    tcg_add_target_add_op_defs(mips_op_defs);
+    tcg_add_target_add_op_defs(s, mips_op_defs);
 }
 
 void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
diff --git a/qemu/tcg/ppc/tcg-target.c b/qemu/tcg/ppc/tcg-target.c
index 203027eb..2d9577d1 100644
--- a/qemu/tcg/ppc/tcg-target.c
+++ b/qemu/tcg/ppc/tcg-target.c
@@ -2534,9 +2534,9 @@ static void tcg_target_init(TCGContext *s)
         have_isa_2_06 = true;
     }
 
-    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
-    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
-    tcg_regset_set32(tcg_target_call_clobber_regs, 0,
+    tcg_regset_set32(s->tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
+    tcg_regset_set32(s->tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
+    tcg_regset_set32(s->tcg_target_call_clobber_regs, 0,
                      (1 << TCG_REG_R0) |
                      (1 << TCG_REG_R2) |
                      (1 << TCG_REG_R3) |
@@ -2564,7 +2564,7 @@ static void tcg_target_init(TCGContext *s)
         tcg_regset_set_reg(s->reserved_regs, TCG_REG_RA);  /* return addr */
     }
 
-    tcg_add_target_add_op_defs(ppc_op_defs);
+    tcg_add_target_add_op_defs(s, ppc_op_defs);
 }
 
 #ifdef __ELF__
diff --git a/qemu/tcg/s390/tcg-target.c b/qemu/tcg/s390/tcg-target.c
index 63e9c82c..668e8648 100644
--- a/qemu/tcg/s390/tcg-target.c
+++ b/qemu/tcg/s390/tcg-target.c
@@ -2283,21 +2283,21 @@ static void tcg_target_init(TCGContext *s)
 {
     query_facilities();
 
-    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);
-    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffff);
+    tcg_regset_set32(s->tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);
+    tcg_regset_set32(s->tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffff);
 
-    tcg_regset_clear(tcg_target_call_clobber_regs);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R0);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R1);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R2);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R3);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R4);
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R5);
+    tcg_regset_clear(s->tcg_target_call_clobber_regs);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R0);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R1);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R2);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R3);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R4);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R5);
     /* The r6 register is technically call-saved, but it's also a parameter
        register, so it can get killed by setup for the qemu_st helper.  */
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R6);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R6);
     /* The return register can be considered call-clobbered.  */
-    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R14);
+    tcg_regset_set_reg(s->tcg_target_call_clobber_regs, TCG_REG_R14);
 
     tcg_regset_clear(s->reserved_regs);
     tcg_regset_set_reg(s->reserved_regs, TCG_TMP0);
@@ -2305,7 +2305,7 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
 
-    tcg_add_target_add_op_defs(s390_op_defs);
+    tcg_add_target_add_op_defs(s, s390_op_defs);
 }
 
 #define FRAME_SIZE  ((int)(TCG_TARGET_CALL_STACK_OFFSET          \
diff --git a/qemu/tcg/sparc/tcg-target.c b/qemu/tcg/sparc/tcg-target.c
index 0c4b0285..6eef1936 100644
--- a/qemu/tcg/sparc/tcg-target.c
+++ b/qemu/tcg/sparc/tcg-target.c
@@ -1560,10 +1560,10 @@ static void tcg_target_init(TCGContext *s)
     }
 #endif
 
-    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
-    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, ALL_64);
+    tcg_regset_set32(s->tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
+    tcg_regset_set32(s->tcg_target_available_regs[TCG_TYPE_I64], 0, ALL_64);
 
-    tcg_regset_set32(tcg_target_call_clobber_regs, 0,
+    tcg_regset_set32(s->tcg_target_call_clobber_regs, 0,
                      (1 << TCG_REG_G1) |
                      (1 << TCG_REG_G2) |
                      (1 << TCG_REG_G3) |
@@ -1589,7 +1589,7 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_T1); /* for internal use */
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_T2); /* for internal use */
 
-    tcg_add_target_add_op_defs(sparc_op_defs);
+    tcg_add_target_add_op_defs(s, sparc_op_defs);
 }
 
 #if SPARC64