From d4549fccfb6d79d07eaa7d048126dcf7a9f80906 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 30 Apr 2019 11:29:24 -0400 Subject: [PATCH] target/arm: Enable FPU for Cortex-M4 and Cortex-M33 Enable the FPU by default for the Cortex-M4 and Cortex-M33. Backports commit 14fd0c31e26b88a2189b3f459b864d5e1faf302a from qemu --- qemu/target/arm/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/qemu/target/arm/cpu.c b/qemu/target/arm/cpu.c index b3286b3c..aeb3353f 100644 --- a/qemu/target/arm/cpu.c +++ b/qemu/target/arm/cpu.c @@ -1190,8 +1190,12 @@ static void cortex_m4_initfn(struct uc_struct *uc, Object *obj, void *opaque) set_feature(&cpu->env, ARM_FEATURE_M); set_feature(&cpu->env, ARM_FEATURE_M_MAIN); set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP); + set_feature(&cpu->env, ARM_FEATURE_VFP4); cpu->midr = 0x410fc240; /* r0p0 */ cpu->pmsav7_dregion = 8; + cpu->isar.mvfr0 = 0x10110021; + cpu->isar.mvfr1 = 0x11000011; + cpu->isar.mvfr2 = 0x00000000; cpu->id_pfr0 = 0x00000030; cpu->id_pfr1 = 0x00000200; cpu->id_dfr0 = 0x00100000; @@ -1218,9 +1222,13 @@ static void cortex_m33_initfn(struct uc_struct *uc, Object *obj, void *opaque) set_feature(&cpu->env, ARM_FEATURE_M_MAIN); set_feature(&cpu->env, ARM_FEATURE_M_SECURITY); set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP); + set_feature(&cpu->env, ARM_FEATURE_VFP4); cpu->midr = 0x410fd213; /* r0p3 */ cpu->pmsav7_dregion = 16; cpu->sau_sregion = 8; + cpu->isar.mvfr0 = 0x10110021; + cpu->isar.mvfr1 = 0x11000011; + cpu->isar.mvfr2 = 0x00000040; cpu->id_pfr0 = 0x00000030; cpu->id_pfr1 = 0x00000210; cpu->id_dfr0 = 0x00200000;