diff --git a/qemu/target/i386/unicorn.c b/qemu/target/i386/unicorn.c index 9fd53bea..d4ff090f 100644 --- a/qemu/target/i386/unicorn.c +++ b/qemu/target/i386/unicorn.c @@ -769,6 +769,21 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun case UC_X86_REG_MXCSR: *(uint32_t *)value = X86_CPU(uc, mycpu)->env.mxcsr; break; + case UC_X86_REG_XMM8: + case UC_X86_REG_XMM9: + case UC_X86_REG_XMM10: + case UC_X86_REG_XMM11: + case UC_X86_REG_XMM12: + case UC_X86_REG_XMM13: + case UC_X86_REG_XMM14: + case UC_X86_REG_XMM15: + { + float64 *dst = (float64*)value; + XMMReg *reg = &X86_CPU(uc, mycpu)->env.xmm_regs[regid - UC_X86_REG_XMM0]; + dst[0] = reg->_d[0]; + dst[1] = reg->_d[1]; + break; + } } break; #endif @@ -1045,6 +1060,21 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i case UC_X86_REG_MXCSR: cpu_set_mxcsr(&X86_CPU(uc, mycpu)->env, *(uint32_t *)value); break; + case UC_X86_REG_XMM8: + case UC_X86_REG_XMM9: + case UC_X86_REG_XMM10: + case UC_X86_REG_XMM11: + case UC_X86_REG_XMM12: + case UC_X86_REG_XMM13: + case UC_X86_REG_XMM14: + case UC_X86_REG_XMM15: + { + float64 *src = (float64*)value; + XMMReg *reg = &X86_CPU(uc, mycpu)->env.xmm_regs[regid - UC_X86_REG_XMM0]; + reg->_d[0] = src[0]; + reg->_d[1] = src[1]; + break; + } } break;