diff --git a/qemu/target/arm/translate.c b/qemu/target/arm/translate.c
index a93abb09..74d96afb 100644
--- a/qemu/target/arm/translate.c
+++ b/qemu/target/arm/translate.c
@@ -8827,7 +8827,6 @@ static void arm_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
 
     dc->V0 = tcg_temp_new_i64(tcg_ctx);
     dc->V1 = tcg_temp_new_i64(tcg_ctx);
-    /* FIXME: dc->M0 can probably be the same as dc->V0.  */
     dc->M0 = tcg_temp_new_i64(tcg_ctx);
 }
 
diff --git a/qemu/target/arm/translate.h b/qemu/target/arm/translate.h
index b4910e38..8e05d05f 100644
--- a/qemu/target/arm/translate.h
+++ b/qemu/target/arm/translate.h
@@ -103,6 +103,7 @@ typedef struct DisasContext {
     TCGv_i64 tmp_a64[TMP_A64_MAX];
 
     // Unicorn: Moved here to avoid global state.
+    /* These are TCG temporaries used only by the legacy iwMMXt decoder */
     TCGv_i64 V0;
     TCGv_i64 V1;
     TCGv_i64 M0;
diff --git a/qemu/tcg/tcg.h b/qemu/tcg/tcg.h
index 978f7c88..7e415e37 100644
--- a/qemu/tcg/tcg.h
+++ b/qemu/tcg/tcg.h
@@ -810,7 +810,6 @@ struct TCGContext {
     TCGv store_dummy;
 
     /* qemu/target-arm/translate.c */
-    /* We reuse the same 64-bit temporaries for efficiency.  */
     TCGv_i32 cpu_R[16];
     TCGv_i32 cpu_CF, cpu_NF, cpu_VF, cpu_ZF;
     TCGv_i64 cpu_exclusive_addr;