From e93f68a7551bad27a45aef310f888b2a0944c925 Mon Sep 17 00:00:00 2001 From: Sergey Fedorov Date: Fri, 23 Feb 2018 21:30:06 -0500 Subject: [PATCH] tcg: Init TB's direct jumps before making it visible Initialize TB's direct jump list data fields and reset the jumps before tb_link_page() puts it into the physical hash table and the physical page list. So TB is completely initialized before it becomes visible. This is pure rearrangement of code to a more suitable place, though it could be a preparation for relaxing the locking scheme in future. Backports commit 901bc3deb43bf37c85e43955905d003be7ae5fa5 from qemu --- qemu/translate-all.c | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/qemu/translate-all.c b/qemu/translate-all.c index b9cf302e..ca55ed2b 100644 --- a/qemu/translate-all.c +++ b/qemu/translate-all.c @@ -1240,19 +1240,6 @@ static void tb_link_page(struct uc_struct *uc, tb->page_addr[1] = -1; } - assert(((uintptr_t)tb & 3) == 0); - tb->jmp_list_first = (uintptr_t)tb | 2; - tb->jmp_list_next[0] = (uintptr_t)NULL; - tb->jmp_list_next[1] = (uintptr_t)NULL; - - /* init original jump addresses */ - if (tb->jmp_reset_offset[0] != TB_JMP_RESET_OFFSET_INVALID) { - tb_reset_jump(tb, 0); - } - if (tb->jmp_reset_offset[1] != TB_JMP_RESET_OFFSET_INVALID) { - tb_reset_jump(tb, 1); - } - #ifdef DEBUG_TB_CHECK tb_page_check(); #endif @@ -1370,6 +1357,20 @@ TranslationBlock *tb_gen_code(CPUState *cpu, ROUND_UP((uintptr_t)gen_code_buf + gen_code_size + search_size, CODE_GEN_ALIGN); + /* init jump list */ + assert(((uintptr_t)tb & 3) == 0); + tb->jmp_list_first = (uintptr_t)tb | 2; + tb->jmp_list_next[0] = (uintptr_t)NULL; + tb->jmp_list_next[1] = (uintptr_t)NULL; + + /* init original jump addresses wich has been set during tcg_gen_code() */ + if (tb->jmp_reset_offset[0] != TB_JMP_RESET_OFFSET_INVALID) { + tb_reset_jump(tb, 0); + } + if (tb->jmp_reset_offset[1] != TB_JMP_RESET_OFFSET_INVALID) { + tb_reset_jump(tb, 1); + } + phys_page2 = -1; /* check next page if needed */ if (tb->size) { @@ -1378,6 +1379,11 @@ TranslationBlock *tb_gen_code(CPUState *cpu, phys_page2 = get_page_addr_code(env, virt_page2); } } + /* As long as consistency of the TB stuff is provided by tb_lock in user + * mode and is implicit in single-threaded softmmu emulation, no explicit + * memory barrier is required before tb_link_page() makes the TB visible + * through the physical hash table and physical page list. + */ tb_link_page(cpu->uc, tb, phys_pc, phys_page2); return tb; }