From f86bd1c5d62b52340ed829cbcbe5d202c8020832 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 16 May 2019 15:14:41 -0400 Subject: [PATCH] tcg: Return bool success from tcg_out_mov This patch merely changes the interface, aborting on all failures, of which there are currently none. Backports commit 78113e83e0007e869c9f0cb4c0497a77538988e3 from qemu --- qemu/tcg/aarch64/tcg-target.inc.c | 5 +++-- qemu/tcg/arm/tcg-target.inc.c | 3 ++- qemu/tcg/i386/tcg-target.inc.c | 5 +++-- qemu/tcg/mips/tcg-target.inc.c | 3 ++- qemu/tcg/ppc/tcg-target.inc.c | 3 ++- qemu/tcg/s390/tcg-target.inc.c | 3 ++- qemu/tcg/sparc/tcg-target.inc.c | 3 ++- qemu/tcg/tcg.c | 14 ++++++++++---- 8 files changed, 26 insertions(+), 13 deletions(-) diff --git a/qemu/tcg/aarch64/tcg-target.inc.c b/qemu/tcg/aarch64/tcg-target.inc.c index 046c3bb0..9ba13c6a 100644 --- a/qemu/tcg/aarch64/tcg-target.inc.c +++ b/qemu/tcg/aarch64/tcg-target.inc.c @@ -935,10 +935,10 @@ static void tcg_out_ldst(TCGContext *s, AArch64Insn insn, TCGReg rd, tcg_out_ldst_r(s, insn, rd, rn, TCG_TYPE_I64, TCG_REG_TMP); } -static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) +static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) { if (ret == arg) { - return; + return true; } switch (type) { case TCG_TYPE_I32: @@ -967,6 +967,7 @@ static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) default: g_assert_not_reached(); } + return true; } static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, diff --git a/qemu/tcg/arm/tcg-target.inc.c b/qemu/tcg/arm/tcg-target.inc.c index 56c751eb..9c149f9d 100644 --- a/qemu/tcg/arm/tcg-target.inc.c +++ b/qemu/tcg/arm/tcg-target.inc.c @@ -2246,10 +2246,11 @@ static inline bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val, return false; } -static inline void tcg_out_mov(TCGContext *s, TCGType type, +static inline bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) { tcg_out_mov_reg(s, COND_AL, ret, arg); + return true; } static inline void tcg_out_movi(TCGContext *s, TCGType type, diff --git a/qemu/tcg/i386/tcg-target.inc.c b/qemu/tcg/i386/tcg-target.inc.c index 8b38cdfc..2f0039cb 100644 --- a/qemu/tcg/i386/tcg-target.inc.c +++ b/qemu/tcg/i386/tcg-target.inc.c @@ -815,12 +815,12 @@ static inline void tgen_arithr(TCGContext *s, int subop, int dest, int src) tcg_out_modrm(s, OPC_ARITH_GvEv + (subop << 3) + ext, dest, src); } -static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) +static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) { int rexw = 0; if (arg == ret) { - return; + return true; } switch (type) { case TCG_TYPE_I64: @@ -858,6 +858,7 @@ static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) default: g_assert_not_reached(); } + return true; } static void tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, diff --git a/qemu/tcg/mips/tcg-target.inc.c b/qemu/tcg/mips/tcg-target.inc.c index 2efac702..8967f222 100644 --- a/qemu/tcg/mips/tcg-target.inc.c +++ b/qemu/tcg/mips/tcg-target.inc.c @@ -558,13 +558,14 @@ static inline void tcg_out_dsra(TCGContext *s, TCGReg rd, TCGReg rt, TCGArg sa) tcg_out_opc_sa64(s, OPC_DSRA, OPC_DSRA32, rd, rt, sa); } -static inline void tcg_out_mov(TCGContext *s, TCGType type, +static inline bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) { /* Simple reg-reg move, optimising out the 'do nothing' case */ if (ret != arg) { tcg_out_opc_reg(s, OPC_OR, ret, arg, TCG_REG_ZERO); } + return true; } static void tcg_out_movi(TCGContext *s, TCGType type, diff --git a/qemu/tcg/ppc/tcg-target.inc.c b/qemu/tcg/ppc/tcg-target.inc.c index dbbe7ccc..6e203670 100644 --- a/qemu/tcg/ppc/tcg-target.inc.c +++ b/qemu/tcg/ppc/tcg-target.inc.c @@ -557,12 +557,13 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, TCGReg base, tcg_target_long offset); -static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) +static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) { tcg_debug_assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32); if (ret != arg) { tcg_out32(s, OR | SAB(arg, ret, arg)); } + return true; } static inline void tcg_out_rld(TCGContext *s, int op, TCGReg ra, TCGReg rs, diff --git a/qemu/tcg/s390/tcg-target.inc.c b/qemu/tcg/s390/tcg-target.inc.c index 547aac5f..16cc8125 100644 --- a/qemu/tcg/s390/tcg-target.inc.c +++ b/qemu/tcg/s390/tcg-target.inc.c @@ -554,7 +554,7 @@ static void tcg_out_sh32(TCGContext* s, S390Opcode op, TCGReg dest, tcg_out_insn_RS(s, op, dest, sh_reg, 0, sh_imm); } -static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg dst, TCGReg src) +static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg dst, TCGReg src) { if (src != dst) { if (type == TCG_TYPE_I32) { @@ -563,6 +563,7 @@ static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg dst, TCGReg src) tcg_out_insn(s, RRE, LGR, dst, src); } } + return true; } static const S390Opcode lli_insns[4] = { diff --git a/qemu/tcg/sparc/tcg-target.inc.c b/qemu/tcg/sparc/tcg-target.inc.c index 1734ad65..04919676 100644 --- a/qemu/tcg/sparc/tcg-target.inc.c +++ b/qemu/tcg/sparc/tcg-target.inc.c @@ -410,12 +410,13 @@ static void tcg_out_arithc(TCGContext *s, TCGReg rd, TCGReg rs1, | (val2const ? INSN_IMM13(val2) : INSN_RS2(val2))); } -static inline void tcg_out_mov(TCGContext *s, TCGType type, +static inline bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) { if (ret != arg) { tcg_out_arith(s, ret, arg, TCG_REG_G0, ARITH_OR); } + return true; } static inline void tcg_out_sethi(TCGContext *s, TCGReg ret, uint32_t arg) diff --git a/qemu/tcg/tcg.c b/qemu/tcg/tcg.c index 2124f674..207599e3 100644 --- a/qemu/tcg/tcg.c +++ b/qemu/tcg/tcg.c @@ -94,7 +94,7 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, const char *ct_str, TCGType type); static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, intptr_t arg2); -static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg); +static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg); static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg ret, tcg_target_long arg); static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, @@ -2845,7 +2845,9 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op) allocated_regs, preferred_regs, ots->indirect_base); } - tcg_out_mov(s, otype, ots->reg, ts->reg); + if (!tcg_out_mov(s, otype, ots->reg, ts->reg)) { + abort(); + } } ots->val_type = TEMP_VAL_REG; ots->mem_coherent = 0; @@ -2945,7 +2947,9 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op) i_allocated_regs, 0); reg = tcg_reg_alloc(s, arg_ct->u.regs, i_allocated_regs, o_preferred_regs, ts->indirect_base); - tcg_out_mov(s, ts->type, reg, ts->reg); + if (!tcg_out_mov(s, ts->type, reg, ts->reg)) { + abort(); + } } new_args[i] = reg; const_args[i] = 0; @@ -3104,7 +3108,9 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op) if (ts->val_type == TEMP_VAL_REG) { if (ts->reg != reg) { tcg_reg_free(s, reg, allocated_regs); - tcg_out_mov(s, ts->type, reg, ts->reg); + if (!tcg_out_mov(s, ts->type, reg, ts->reg)) { + abort(); + } } } else { TCGRegSet arg_set = 0;