From f96988503a4a42cef5da516ae48e9ae927c74fe1 Mon Sep 17 00:00:00 2001
From: Peter Maydell <peter.maydell@linaro.org>
Date: Sun, 18 Feb 2018 22:11:35 -0500
Subject: [PATCH] target-arm: Implement asidx_from_attrs

Implement the asidx_from_attrs CPU method to return the
Secure or NonSecure address space as appropriate.

(The function is inline so we can use it directly in target-arm
code to be added in later patches.)

Backports commit 017518c1f6ed9939c7f390cb91078f0919b5494c from qemu
---
 qemu/target-arm/cpu.c | 1 +
 qemu/target-arm/cpu.h | 8 ++++++++
 2 files changed, 9 insertions(+)

diff --git a/qemu/target-arm/cpu.c b/qemu/target-arm/cpu.c
index 5742f46d..69714d45 100644
--- a/qemu/target-arm/cpu.c
+++ b/qemu/target-arm/cpu.c
@@ -1328,6 +1328,7 @@ static void arm_cpu_class_init(struct uc_struct *uc, ObjectClass *oc, void *data
     cc->do_interrupt = arm_cpu_do_interrupt;
     cc->do_unaligned_access = arm_cpu_do_unaligned_access;
     cc->get_phys_page_debug = arm_cpu_get_phys_page_debug;
+    cc->asidx_from_attrs = arm_asidx_from_attrs;
     // UNICORN: Commented out
     //cc->vmsd = &vmstate_arm_cpu;
     //cc->virtio_is_big_endian = arm_cpu_is_big_endian;
diff --git a/qemu/target-arm/cpu.h b/qemu/target-arm/cpu.h
index 5e340080..a6673874 100644
--- a/qemu/target-arm/cpu.h
+++ b/qemu/target-arm/cpu.h
@@ -2045,4 +2045,12 @@ enum {
     QEMU_PSCI_CONDUIT_HVC = 2,
 };
 
+#ifndef CONFIG_USER_ONLY
+/* Return the address space index to use for a memory access */
+static inline int arm_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs)
+{
+    return attrs.secure ? ARMASIdx_S : ARMASIdx_NS;
+}
+#endif
+
 #endif