From fe9271d5bdcecf1fdca7ea625f4afe3cd3967dd4 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 6 Mar 2018 08:51:52 -0500 Subject: [PATCH] get_phys_addr_pmsav7: Support AP=0b111 for v7M For PMSAv7, the v7A/R Arm ARM defines that setting AP to 0b111 is an UNPREDICTABLE reserved combination. However, for v7M this value is documented as having the same behaviour as 0b110: read-only for both privileged and unprivileged. Accept this value on an M profile core rather than treating it as a guest error and a no-access page. Backports commit 8638f1ad7403b63db880dadce38e6690b5d82b64 from qemu --- qemu/target/arm/helper.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index 5a092946..ed959904 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -8456,6 +8456,13 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, case 6: *prot |= PAGE_READ | PAGE_EXEC; break; + case 7: + /* for v7M, same as 6; for R profile a reserved value */ + if (arm_feature(env, ARM_FEATURE_M)) { + *prot |= PAGE_READ | PAGE_EXEC; + break; + } + /* fall through */ default: qemu_log_mask(LOG_GUEST_ERROR, "DRACR[%d]: Bad value for AP bits: 0x%" @@ -8474,6 +8481,13 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, case 6: *prot |= PAGE_READ | PAGE_EXEC; break; + case 7: + /* for v7M, same as 6; for R profile a reserved value */ + if (arm_feature(env, ARM_FEATURE_M)) { + *prot |= PAGE_READ | PAGE_EXEC; + break; + } + /* fall through */ default: qemu_log_mask(LOG_GUEST_ERROR, "DRACR[%d]: Bad value for AP bits: 0x%"