mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2025-07-19 19:08:25 +00:00
c7a17d04a2
Vector strided operations access the first memory element at the base address, and then access subsequent elements at address increments given by the byte offset contained in the x register specified by rs2. Vector unit-stride operations access elements stored contiguously in memory starting from the base effective address. It can been seen as a special case of strided operations. Backports 751538d5da557e5c10e5045c2d27639580ea54a7
31 lines
995 B
C
31 lines
995 B
C
/*
|
|
* QEMU RISC-V CPU -- internal functions and types
|
|
*
|
|
* Copyright (c) 2020 T-Head Semiconductor Co., Ltd. All rights reserved.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms and conditions of the GNU General Public License,
|
|
* version 2 or later, as published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
* more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License along with
|
|
* this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#ifndef RISCV_CPU_INTERNALS_H
|
|
#define RISCV_CPU_INTERNALS_H
|
|
|
|
#include "hw/registerfields.h"
|
|
|
|
/* share data between vector helpers and decode code */
|
|
FIELD(VDATA, MLEN, 0, 8)
|
|
FIELD(VDATA, VM, 8, 1)
|
|
FIELD(VDATA, LMUL, 9, 2)
|
|
FIELD(VDATA, NF, 11, 4)
|
|
|
|
#endif
|