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Author SHA1 Message Date
Martin Löffler c29389d3eb
subtraction 2023-01-26 03:04:12 +01:00
Martin Löffler 51d2e29775
better addition and cc setting 2023-01-26 00:30:30 +01:00
2 changed files with 45 additions and 30 deletions

View file

@ -1,57 +1,67 @@
use crate::structs::{get_register_pair, set_register, set_register_pair}; use crate::structs::{get_register_pair, set_register, set_register_pair};
use crate::{get_register, EmulatorState, Register}; use crate::{get_register, EmulatorState, Register};
/// Sets the condition code flags according to `result`. `flags` parameter /// Sets the condition code flags according to `result`.
/// indicates which flags will be set, 0b1111 will set all (Z, S, C, P) /// Does not set the carry flag and will always set the Z, S and P flags.
/// while 0b1000 will only set Z. #[inline(always)]
fn set_cc(state: &mut EmulatorState, result: u16, flags: u8) { fn set_cc(state: &mut EmulatorState, result: u8) {
if flags & 0b1000 > 0 { state.cc.z = result == 0;
state.cc.z = (result & 0xff) == 0; state.cc.s = result & 0x80 > 0;
} state.cc.p = result.count_ones() % 2 == 0;
if flags & 0b0100 > 0 {
state.cc.s = (result & 0x80) > 0;
}
if flags & 0b0010 > 0 {
state.cc.c = result > 0xff;
}
if flags & 0b0001 > 0 {
state.cc.p = (result & 0xff).count_ones() % 2 == 0;
}
} }
/// Add values of `register` and `A`, add +1 if carry arg is set (either false or state.cc.c) /// Add values of `register` and `A`, add +1 if carry arg is set (either false or state.cc.c)
pub fn add(register: Register, carry: bool, state: &mut EmulatorState) { pub fn add_reg(register: Register, carry: bool, state: &mut EmulatorState) {
let result = get_register(register, state) as u16 + state.a as u16 + u16::from(carry); add(get_register(register, state), carry, state);
set_cc(state, result, 0b1111);
state.a = (result & 0xff) as u8;
} }
/// Add values of input byte and `A`, add +1 if carry arg is set (either false or state.cc.c) /// Add values of input byte and `A`, add +1 if carry arg is set (either false or state.cc.c)
pub fn adi(byte: u8, carry: bool, state: &mut EmulatorState) { pub fn add(byte: u8, carry: bool, state: &mut EmulatorState) {
let result = state.a as u16 + byte as u16 + u16::from(carry); let (a, first) = state.a.overflowing_add(byte);
set_cc(state, result, 0b1111); let (result, second) = a.overflowing_add(carry as u8);
state.a = result as u8;
state.cc.c = first != second;
set_cc(state, result);
state.a = result;
}
pub fn sub_reg(register: Register, borrow: bool, state: &mut EmulatorState) {
sub(get_register(register, state), borrow, state);
}
pub fn sub(byte: u8, borrow: bool, state: &mut EmulatorState) {
let (a, first) = state.a.overflowing_sub(byte);
let (result, second) = a.overflowing_sub(borrow as u8);
state.cc.c = first != second;
set_cc(state, result);
state.a = result;
} }
/// Double precision add - Add B&C, D&E or H&L to H&L /// Double precision add - Add B&C, D&E or H&L to H&L
pub fn dad(register: Register, state: &mut EmulatorState) { pub fn dad(register: Register, state: &mut EmulatorState) {
let num = get_register_pair(register, state); let num = get_register_pair(register, state);
let (result, overflow) = num.overflowing_add(u16::from_le_bytes([state.l, state.h])); let (result, overflow) = num.overflowing_add(u16::from_le_bytes([state.l, state.h]));
// this is the only 16-bit arithmetic function that sets the other flags
state.cc.z = result == 0;
state.cc.s = result & 0x8000 > 0;
state.cc.c = overflow; state.cc.c = overflow;
state.cc.p = result.count_ones() % 2 == 0;
set_register_pair(register, result, state); set_register_pair(register, result, state);
} }
/// Increase register /// Increase register
pub fn inr(register: Register, state: &mut EmulatorState) { pub fn inr(register: Register, state: &mut EmulatorState) {
let (result, _) = get_register(register, state).overflowing_add(1); let (result, _) = get_register(register, state).overflowing_add(1);
set_cc(state, result as u16, 0b1101); set_cc(state, result);
set_register(register, result, state); set_register(register, result, state);
} }
/// Decrease register /// Decrease register
pub fn dcr(register: Register, state: &mut EmulatorState) { pub fn dcr(register: Register, state: &mut EmulatorState) {
let (result, _) = get_register(register, state).overflowing_sub(1); let (result, _) = get_register(register, state).overflowing_sub(1);
set_cc(state, result as u16, 0b1101); set_cc(state, result);
set_register(register, result, state); set_register(register, result, state);
} }

View file

@ -111,10 +111,15 @@ fn tick(state: &mut EmulatorState) {
0x2b => arithmetic::dcx(Register::H, state), 0x2b => arithmetic::dcx(Register::H, state),
0x3b => arithmetic::dcx(Register::SP, state), 0x3b => arithmetic::dcx(Register::SP, state),
0x80..=0x87 => arithmetic::add(register_from_num(instruction & 0xf), false, state), // ADD 0x80..=0x87 => arithmetic::add_reg(register_from_num(instruction & 0xf), false, state), // ADD
0x88..=0x8f => arithmetic::add(register_from_num(instruction & 0xf), state.cc.c, state), // ADC 0x88..=0x8f => arithmetic::add_reg(register_from_num(instruction & 0xf), state.cc.c, state), // ADC
0xc6 => arithmetic::adi(next_byte(), false, state), // ADI 0xc6 => arithmetic::add(next_byte(), false, state), // ADI
0xce => arithmetic::adi(next_byte(), state.cc.c, state), // ACI 0xce => arithmetic::add(next_byte(), state.cc.c, state), // ACI
0x90..=0x97 => arithmetic::sub_reg(register_from_num(instruction & 0xf), false, state), // SUB
0x98..=0x9f => arithmetic::sub_reg(register_from_num(instruction & 0xf), state.cc.c, state), // SBB
0xd6 => arithmetic::sub(next_byte(), false, state), // SUI
0xde => arithmetic::sub(next_byte(), state.cc.c, state), // SBI
_ => not_implemented(state), _ => not_implemented(state),
} }