init commit
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commit
072686ea8d
1
.gitignore
vendored
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1
.gitignore
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/target
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7
Cargo.lock
generated
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7
Cargo.lock
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# This file is automatically @generated by Cargo.
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# It is not intended for manual editing.
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version = 3
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[[package]]
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name = "invadeez"
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version = "0.1.0"
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12
Cargo.toml
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Cargo.toml
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[package]
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name = "invadeez"
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version = "0.1.0"
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edition = "2021"
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# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
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[dependencies]
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[[bin]]
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name = "decompiler"
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path = "src/decompiler/main.rs"
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BIN
rom/invaders
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BIN
rom/invaders
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BIN
rom/invaders.e
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BIN
rom/invaders.e
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BIN
rom/invaders.f
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rom/invaders.f
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BIN
rom/invaders.g
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rom/invaders.g
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rom/invaders.h
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rom/invaders.h
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src/decompiler/main.rs
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src/decompiler/main.rs
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use std::fs;
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use core::slice::Iter;
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fn main() {
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let file = fs::read("/home/lea/Downloads/invadeez/invadeez/rom/invaders.h").expect("where file");
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let mut data = file.iter();
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while let Some(byte) = data.next() {
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fn next(data: &mut Iter<u8>, len: u8) -> String {
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let mut res = String::new();
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for _ in 0..len {
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res.insert_str(0, format!("{:x}", data.next().expect("Expected data")).as_str());
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}
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return res;
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}
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// http://www.emulator101.com/reference/8080-by-opcode.html
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let instruction: String = match byte {
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0x00 => format!("NOP"),
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0x01 => format!("LXI B,#${}", next(&mut data, 2)),
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0x02 => format!("STAX B"),
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0x03 => format!("INX B"),
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0x04 => format!("INR B"),
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0x05 => format!("DCR B"),
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0x06 => format!("MVI B,#0x{}", next(&mut data, 1)),
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0x07 => format!("RLC"),
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0x09 => format!("DAD B"),
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0x0a => format!("LDAX B"),
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0x0b => format!("DCX B"),
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0x0c => format!("INR C"),
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0x0d => format!("DCR C"),
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0x0e => format!("MVI C,#0x{}", next(&mut data, 1)),
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0x0f => format!("RRC"),
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0x11 => format!("LXI D,#0x{}", next(&mut data, 2)),
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0x12 => format!("STAX D"),
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0x13 => format!("INX D"),
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0x14 => format!("INR D"),
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0x15 => format!("DCR D"),
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0x16 => format!("MVI D,#0x{}", next(&mut data, 1)),
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0x17 => format!("RAL"),
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0x19 => format!("DAD D"),
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0x1a => format!("LDAX D"),
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0x1b => format!("DCX D"),
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0x1c => format!("INR E"),
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0x1d => format!("DCR E"),
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0x1e => format!("MVI E,#0x{}", next(&mut data, 1)),
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0x1f => format!("RAR"),
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0x21 => format!("LXI H,#0x{}", next(&mut data, 2)),
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0x22 => format!("SLHD %0x{}", next(&mut data, 2)),
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0x23 => format!("INX H"),
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0x24 => format!("INR H"),
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0x25 => format!("DCR H"),
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0x26 => format!("MVI H,{}", next(&mut data, 1)),
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0x27 => format!("DAA"),
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0x29 => format!("DAD H"),
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0x2a => format!("LHLD ${}", next(&mut data, 2)),
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0x2b => format!("DCX H"),
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0x2c => format!("INR L"),
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0x2d => format!("DCR L"),
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0x2e => format!("MVI L,#0x{}", next(&mut data, 1)),
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0x2f => format!("CMA"),
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0x31 => format!("LXI SP,#0x{}", next(&mut data, 2)),
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0x32 => format!("STA ${}", next(&mut data, 2)),
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0x33 => format!("INX SP"),
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0x34 => format!("INR M"),
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0x35 => format!("DCR M"),
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0x36 => format!("MVI M,#0x{}", next(&mut data, 1)),
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0x37 => format!("STC"),
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0x39 => format!("DAD SP"),
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0x3a => format!("LDA ${}", next(&mut data, 2)),
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0x3b => format!("DCX SP"),
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0x3c => format!("INR A"),
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0x3d => format!("DCR A"),
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0x3e => format!("MVI A,#0x{}", next(&mut data, 1)),
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0x3f => format!("CMC"),
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// -- continue here --
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0xc3 => format!("JMP ${}", next(&mut data, 2)),
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0xc5 => format!("PUSH B"),
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0xd5 => format!("PUSH D"),
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0xe5 => format!("PUSH H"),
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0xf5 => format!("PUSH PSW"),
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_ => panic!("Unimplemented instruction {:#x}", byte),
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};
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println!("{}", instruction);
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}
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}
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