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Display memory location next to instructions

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This commit is contained in:
Lea 2023-01-25 10:39:14 +01:00
parent 44930070c2
commit 09e60b33f3
Signed by: Lea
GPG key ID: 1BAFFE8347019C42
2 changed files with 61 additions and 51 deletions
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2
.gitignore vendored
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@ -1,3 +1,3 @@
/target /target
test/ test/
output

108
src/disassembler/main.rs
View file

@ -1,9 +1,9 @@
#![allow(clippy::useless_format)] #![allow(clippy::useless_format)]
#![allow(clippy::too_many_lines)] #![allow(clippy::too_many_lines)]
use core::slice::Iter;
use std::{env, fs}; use std::{env, fs};
const REGISTERS: [&str; 8] = ["B", "C", "D", "E", "H", "L", "M", "A"]; const REGISTERS: [&str; 8] = ["B", "C", "D", "E", "H", "L", "M", "A"];
const PRINT_MEMLOC: bool = true;
fn main() { fn main() {
let mut args = env::args(); let mut args = env::args();
@ -12,80 +12,85 @@ fn main() {
.expect("Provide a path to a file to disassemble as an argument"); .expect("Provide a path to a file to disassemble as an argument");
let file = fs::read(filename).expect("where file"); let file = fs::read(filename).expect("where file");
let mut data = file.iter(); let mut data = file.iter();
let mut index: u32 = 0;
while let Some(byte) = data.next() { while let Some(byte) = data.next() {
fn next(data: &mut Iter<u8>, len: u8) -> String { let current_index = index.clone();
index += 1;
let mut next = |len: u8| {
let mut res = String::new(); let mut res = String::new();
index += len as u32;
for _ in 0..len { for _ in 0..len {
res.insert_str( res.insert_str(
0, 0,
format!("{:x}", data.next().expect("Expected data")).as_str(), format!("{:02x}", data.next().expect("Expected data")).as_str(),
); );
} }
res res
} };
// http://www.emulator101.com/reference/8080-by-opcode.html // http://www.emulator101.com/reference/8080-by-opcode.html
let instruction: String = match byte { let instruction: String = match byte {
0x00 => format!("NOP"), 0x00 => format!("NOP"),
0x01 => format!("LXI B,#${}", next(&mut data, 2)), 0x01 => format!("LXI B,#${}", next(2)),
0x02 => format!("STAX B"), 0x02 => format!("STAX B"),
0x03 => format!("INX B"), 0x03 => format!("INX B"),
0x04 => format!("INR B"), 0x04 => format!("INR B"),
0x05 => format!("DCR B"), 0x05 => format!("DCR B"),
0x06 => format!("MVI B,#${}", next(&mut data, 1)), 0x06 => format!("MVI B,#${}", next(1)),
0x07 => format!("RLC"), 0x07 => format!("RLC"),
0x09 => format!("DAD B"), 0x09 => format!("DAD B"),
0x0a => format!("LDAX B"), 0x0a => format!("LDAX B"),
0x0b => format!("DCX B"), 0x0b => format!("DCX B"),
0x0c => format!("INR C"), 0x0c => format!("INR C"),
0x0d => format!("DCR C"), 0x0d => format!("DCR C"),
0x0e => format!("MVI C,#${}", next(&mut data, 1)), 0x0e => format!("MVI C,#${}", next(1)),
0x0f => format!("RRC"), 0x0f => format!("RRC"),
0x11 => format!("LXI D,#${}", next(&mut data, 2)), 0x11 => format!("LXI D,#${}", next(2)),
0x12 => format!("STAX D"), 0x12 => format!("STAX D"),
0x13 => format!("INX D"), 0x13 => format!("INX D"),
0x14 => format!("INR D"), 0x14 => format!("INR D"),
0x15 => format!("DCR D"), 0x15 => format!("DCR D"),
0x16 => format!("MVI D,#${}", next(&mut data, 1)), 0x16 => format!("MVI D,#${}", next(1)),
0x17 => format!("RAL"), 0x17 => format!("RAL"),
0x19 => format!("DAD D"), 0x19 => format!("DAD D"),
0x1a => format!("LDAX D"), 0x1a => format!("LDAX D"),
0x1b => format!("DCX D"), 0x1b => format!("DCX D"),
0x1c => format!("INR E"), 0x1c => format!("INR E"),
0x1d => format!("DCR E"), 0x1d => format!("DCR E"),
0x1e => format!("MVI E,#${}", next(&mut data, 1)), 0x1e => format!("MVI E,#${}", next(1)),
0x1f => format!("RAR"), 0x1f => format!("RAR"),
0x21 => format!("LXI H,#${}", next(&mut data, 2)), 0x21 => format!("LXI H,#${}", next(2)),
0x22 => format!("SLHD #${}", next(&mut data, 2)), 0x22 => format!("SLHD #${}", next(2)),
0x23 => format!("INX H"), 0x23 => format!("INX H"),
0x24 => format!("INR H"), 0x24 => format!("INR H"),
0x25 => format!("DCR H"), 0x25 => format!("DCR H"),
0x26 => format!("MVI H,#${}", next(&mut data, 1)), 0x26 => format!("MVI H,#${}", next(1)),
0x27 => format!("DAA"), 0x27 => format!("DAA"),
0x29 => format!("DAD H"), 0x29 => format!("DAD H"),
0x2a => format!("LHLD ${}", next(&mut data, 2)), 0x2a => format!("LHLD ${}", next(2)),
0x2b => format!("DCX H"), 0x2b => format!("DCX H"),
0x2c => format!("INR L"), 0x2c => format!("INR L"),
0x2d => format!("DCR L"), 0x2d => format!("DCR L"),
0x2e => format!("MVI L,#${}", next(&mut data, 1)), 0x2e => format!("MVI L,#${}", next(1)),
0x2f => format!("CMA"), 0x2f => format!("CMA"),
0x31 => format!("LXI SP,#${}", next(&mut data, 2)), 0x31 => format!("LXI SP,#${}", next(2)),
0x32 => format!("STA ${}", next(&mut data, 2)), 0x32 => format!("STA ${}", next(2)),
0x33 => format!("INX SP"), 0x33 => format!("INX SP"),
0x34 => format!("INR M"), 0x34 => format!("INR M"),
0x35 => format!("DCR M"), 0x35 => format!("DCR M"),
0x36 => format!("MVI M,#${}", next(&mut data, 1)), 0x36 => format!("MVI M,#${}", next(1)),
0x37 => format!("STC"), 0x37 => format!("STC"),
0x39 => format!("DAD SP"), 0x39 => format!("DAD SP"),
0x3a => format!("LDA ${}", next(&mut data, 2)), 0x3a => format!("LDA ${}", next(2)),
0x3b => format!("DCX SP"), 0x3b => format!("DCX SP"),
0x3c => format!("INR A"), 0x3c => format!("INR A"),
0x3d => format!("DCR A"), 0x3d => format!("DCR A"),
0x3e => format!("MVI A,#${}", next(&mut data, 1)), 0x3e => format!("MVI A,#${}", next(1)),
0x3f => format!("CMC"), 0x3f => format!("CMC"),
0x76 => format!("HLT ; Trigger interrupt"), 0x76 => format!("HLT ; Trigger interrupt"),
0x40..=0x7f // Test this! 0x40..=0x7f // Test this!
@ -108,66 +113,71 @@ fn main() {
=> format!("CMP {}", REGISTERS[(byte & 0b111) as usize]), => format!("CMP {}", REGISTERS[(byte & 0b111) as usize]),
0xc0 => format!("RNZ"), 0xc0 => format!("RNZ"),
0xc1 => format!("POP B"), 0xc1 => format!("POP B"),
0xc2 => format!("JNZ ${}", next(&mut data, 2)), 0xc2 => format!("JNZ ${}", next(2)),
0xc3 => format!("JMP ${}", next(&mut data, 2)), 0xc3 => format!("JMP ${}", next(2)),
0xc4 => format!("CNZ ${}", next(&mut data, 2)), 0xc4 => format!("CNZ ${}", next(2)),
0xc5 => format!("PUSH B"), 0xc5 => format!("PUSH B"),
0xc6 => format!("ADI #${}", next(&mut data, 1)), 0xc6 => format!("ADI #${}", next(1)),
0xc7 => format!("RST 0 ; CALL $0"), 0xc7 => format!("RST 0 ; CALL $0"),
0xc8 => format!("RZ"), 0xc8 => format!("RZ"),
0xc9 => format!("RET"), 0xc9 => format!("RET"),
0xca => format!("JZ ${}", next(&mut data, 2)), 0xca => format!("JZ ${}", next(2)),
0xcc => format!("CZ ${}", next(&mut data, 2)), 0xcc => format!("CZ ${}", next(2)),
0xcd => format!("CALL ${}", next(&mut data, 2)), 0xcd => format!("CALL ${}", next(2)),
0xce => format!("ACI #${}", next(&mut data, 1)), 0xce => format!("ACI #${}", next(1)),
0xcf => format!("RST 1 ; CALL $8"), 0xcf => format!("RST 1 ; CALL $8"),
0xd0 => format!("RNC"), 0xd0 => format!("RNC"),
0xd1 => format!("POP D"), 0xd1 => format!("POP D"),
0xd2 => format!("JNC ${}", next(&mut data, 2)), 0xd2 => format!("JNC ${}", next(2)),
0xd3 => format!("OUT #${}", next(&mut data, 1)), 0xd3 => format!("OUT #${}", next(1)),
0xd4 => format!("CNC ${}", next(&mut data, 2)), 0xd4 => format!("CNC ${}", next(2)),
0xd5 => format!("PUSH D"), 0xd5 => format!("PUSH D"),
0xd6 => format!("SUI #${}", next(&mut data, 1)), 0xd6 => format!("SUI #${}", next(1)),
0xd7 => format!("RST 2 ; CALL $10"), 0xd7 => format!("RST 2 ; CALL $10"),
0xd8 => format!("RC"), 0xd8 => format!("RC"),
0xda => format!("JC ${}", next(&mut data, 2)), 0xda => format!("JC ${}", next(2)),
0xdb => format!("IN #${}", next(&mut data, 1)), 0xdb => format!("IN #${}", next(1)),
0xdc => format!("CC ${}", next(&mut data, 2)), 0xdc => format!("CC ${}", next(2)),
0xde => format!("SBI #${}", next(&mut data, 1)), 0xde => format!("SBI #${}", next(1)),
0xdf => format!("RST 3 ; $CALL 18"), 0xdf => format!("RST 3 ; $CALL 18"),
0xe0 => format!("RPO"), 0xe0 => format!("RPO"),
0xe1 => format!("POP H"), 0xe1 => format!("POP H"),
0xe2 => format!("JPO ${}", next(&mut data, 2)), 0xe2 => format!("JPO ${}", next(2)),
0xe3 => format!("XTHL"), 0xe3 => format!("XTHL"),
0xe4 => format!("CPO ${}", next(&mut data, 2)), 0xe4 => format!("CPO ${}", next(2)),
0xe5 => format!("PUSH H"), 0xe5 => format!("PUSH H"),
0xe6 => format!("ANI #${}", next(&mut data, 1)), 0xe6 => format!("ANI #${}", next(1)),
0xe7 => format!("RST 4 ; CALL $20"), 0xe7 => format!("RST 4 ; CALL $20"),
0xe8 => format!("RPE"), 0xe8 => format!("RPE"),
0xe9 => format!("PCHL"), 0xe9 => format!("PCHL"),
0xea => format!("JPE ${}", next(&mut data, 2)), 0xea => format!("JPE ${}", next(2)),
0xeb => format!("XCHG"), 0xeb => format!("XCHG"),
0xec => format!("CPE ${}", next(&mut data, 2)), 0xec => format!("CPE ${}", next(2)),
0xee => format!("XRI #${}", next(&mut data, 1)), 0xee => format!("XRI #${}", next(1)),
0xef => format!("RST 5 ; CALL $28"), 0xef => format!("RST 5 ; CALL $28"),
0xf0 => format!("RP"), 0xf0 => format!("RP"),
0xf1 => format!("POP PSW"), 0xf1 => format!("POP PSW"),
0xf2 => format!("JP ${}", next(&mut data, 2)), 0xf2 => format!("JP ${}", next(2)),
0xf3 => format!("DI"), 0xf3 => format!("DI"),
0xf4 => format!("CP ${}", next(&mut data, 2)), 0xf4 => format!("CP ${}", next(2)),
0xf5 => format!("PUSH PSW"), 0xf5 => format!("PUSH PSW"),
0xf6 => format!("ORI #${}", next(&mut data, 1)), 0xf6 => format!("ORI #${}", next(1)),
0xf7 => format!("RST 6 ; CALL $30"), 0xf7 => format!("RST 6 ; CALL $30"),
0xf8 => format!("RM"), 0xf8 => format!("RM"),
0xf9 => format!("SPHL"), 0xf9 => format!("SPHL"),
0xfa => format!("JM ${}", next(&mut data, 2)), 0xfa => format!("JM ${}", next(2)),
0xfb => format!("EI"), 0xfb => format!("EI"),
0xfc => format!("CM ${}", next(&mut data, 2)), 0xfc => format!("CM ${}", next(2)),
0xfe => format!("CPI #${}", next(&mut data, 1)), 0xfe => format!("CPI #${}", next(1)),
0xff => format!("RST 7 ; CALL $38"), 0xff => format!("RST 7 ; CALL $38"),
_ => panic!("Unimplemented instruction {byte:#x}"), _ => format!("; Unknown instruction {byte:#x}"),
// _ => panic!("Unimplemented instruction {byte:#x}"),
}; };
if PRINT_MEMLOC {
println!("{:04x} {}", current_index, instruction);
} else {
println!("{instruction}"); println!("{instruction}");
} }
}
} }