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turns out 8 bit processors process 8 bit numbers

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This commit is contained in:
Lea 2023-01-25 19:08:00 +01:00
parent cf4565c36b
commit 5be0da1a90
Signed by: Lea
GPG key ID: 1BAFFE8347019C42
2 changed files with 17 additions and 17 deletions
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12
src/emulator/instructions/arithmetic.rs
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@ -12,7 +12,7 @@ fn set_cc(state: &mut EmulatorState, result: u16, flags: u8) {
/// Add values of `register` and `A`
pub fn add(register: Register, state: &mut EmulatorState) {
let result = get_register(register, state) + state.a as u16;
let result = get_register(register, state) as u16 + state.a as u16;
set_cc(state, result, 0b1111);
state.a = (result & 0xff) as u8;
}
@ -26,7 +26,7 @@ pub fn adi(byte: u8, state: &mut EmulatorState) {
/// Add values of `register` and `A` and add +1 if carry bit is set
pub fn adc(register: Register, state: &mut EmulatorState) {
let result = get_register(register, state) + state.a as u16 + if state.cc.c { 1 } else { 0 };
let result = get_register(register, state) as u16 + state.a as u16 + if state.cc.c { 1 } else { 0 };
set_cc(state, result, 0b1111);
state.a = (result & 0xff) as u8;
}
@ -41,14 +41,14 @@ pub fn aci(byte: u8, state: &mut EmulatorState) {
/// Double precision add - Add B&C, D&E or H&L to H&L
pub fn dad(register: Register, state: &mut EmulatorState) {
let num = match register {
Register::B => (state.b as u16) << 8 | state.c as u16,
Register::D => (state.d as u16) << 8 | state.e as u16,
Register::H => get_register(Register::M, state),
Register::B => u16::from_le_bytes([state.c, state.b]),
Register::D => u16::from_le_bytes([state.e, state.d]),
Register::H => u16::from_le_bytes([state.l, state.h]),
Register::SP => state.sp,
_ => panic!("Cannot perform DAD on register {:?}", register),
};
let result = num as u32 + get_register(Register::M, state) as u32;
let result = num as u32 + u16::from_le_bytes([state.l, state.h]) as u32;
state.cc.c = result > 0xffff;
state.h = (result >> 8) as u8;
state.l = result as u8;

22
src/emulator/main.rs
View file

@ -58,17 +58,17 @@ fn register_from_num(b: u8) -> Register {
}
}
fn get_register(register: Register, state: &EmulatorState) -> u16 {
fn get_register(register: Register, state: &EmulatorState) -> u8 {
match register {
Register::B => state.b as u16,
Register::C => state.c as u16,
Register::D => state.d as u16,
Register::E => state.e as u16,
Register::H => state.h as u16,
Register::L => state.l as u16,
Register::A => state.a as u16,
Register::M => (state.memory[(state.h as usize)] as u16) << 8 | (state.memory[state.l as usize] as u16),
Register::SP => state.sp,
Register::B => state.b as u8,
Register::C => state.c as u8,
Register::D => state.d as u8,
Register::E => state.e as u8,
Register::H => state.h as u8,
Register::L => state.l as u8,
Register::A => state.a as u8,
Register::M => state.memory[u16::from_le_bytes([state.l, state.h]) as usize],
Register::SP => unreachable!(),
}
}
@ -81,7 +81,7 @@ fn set_register(register: Register, value: u8, state: &mut EmulatorState) {
Register::H => state.h = value,
Register::L => state.l = value,
Register::A => state.a = value,
Register::M => panic!("Cannot set pseudoregister 'M'"),
Register::M => state.memory[u16::from_le_bytes([state.l, state.h]) as usize] = value,
Register::SP => panic!("Cannot set 'SP' through set_register()"),
};
}