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https://github.com/citra-emu/citra-nightly.git
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dyncom: Remove unnecessary initialization code.
Targeting ARM version variants was only a thing on armemu. The reset routine also does basically the same thing as NewState.
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3257d797e1
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03213f893e
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@ -20,15 +20,8 @@
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ARM_DynCom::ARM_DynCom(PrivilegeMode initial_mode) {
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state = Common::make_unique<ARMul_State>();
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ARMul_NewState(state.get());
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ARMul_SelectProcessor(state.get(), ARM_v6_Prop | ARM_v5_Prop | ARM_v5e_Prop);
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state->bigendSig = LOW;
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state->NirqSig = HIGH;
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// Reset the core to initial state
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ARMul_Reset(state.get());
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state->Emulate = RUN;
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// Switch to the desired privilege mode.
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switch_mode(state.get(), initial_mode);
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@ -19,33 +19,6 @@
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#include "core/arm/skyeye_common/armstate.h"
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#include "core/arm/skyeye_common/vfp/vfp.h"
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/***************************************************************************\
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* Returns a new instantiation of the ARMulator's state *
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\***************************************************************************/
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ARMul_State* ARMul_NewState(ARMul_State* state)
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{
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state->Emulate = RUN;
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state->Mode = USER32MODE;
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state->lateabtSig = HIGH;
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state->bigendSig = LOW;
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return state;
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}
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/***************************************************************************\
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* Call this routine to set ARMulator to model a certain processor *
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\***************************************************************************/
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void ARMul_SelectProcessor(ARMul_State* state, unsigned properties)
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{
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state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0;
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state->is_v5 = (properties & ARM_v5_Prop) != 0;
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state->is_v5e = (properties & ARM_v5e_Prop) != 0;
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state->is_v6 = (properties & ARM_v6_Prop) != 0;
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state->is_v7 = (properties & ARM_v7_Prop) != 0;
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}
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// Resets certain MPCore CP15 values to their ARM-defined reset values.
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static void ResetMPCoreCP15Registers(ARMul_State* cpu)
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{
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@ -104,9 +77,7 @@ static void ResetMPCoreCP15Registers(ARMul_State* cpu)
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cpu->CP15[CP15_TLB_DEBUG_CONTROL] = 0x00000000;
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}
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/***************************************************************************\
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* Call this routine to set up the initial machine state (or perform a RESET *
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\***************************************************************************/
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// Performs a reset
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void ARMul_Reset(ARMul_State* state)
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{
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VFPInit(state);
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@ -125,4 +96,5 @@ void ARMul_Reset(ARMul_State* state)
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state->abortSig = LOW;
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state->NumInstrs = 0;
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state->Emulate = RUN;
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}
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@ -89,30 +89,11 @@ struct ARMul_State
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unsigned bigendSig;
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unsigned syscallSig;
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// For differentiating ARM core emulation.
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bool is_v4; // Are we emulating a v4 architecture (or higher)?
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bool is_v5; // Are we emulating a v5 architecture?
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bool is_v5e; // Are we emulating a v5e architecture?
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bool is_v6; // Are we emulating a v6 architecture?
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bool is_v7; // Are we emulating a v7 architecture?
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// TODO(bunnei): Move this cache to a better place - it should be per codeset (likely per
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// process for our purposes), not per ARMul_State (which tracks CPU core state).
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std::unordered_map<u32, int> instruction_cache;
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};
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/***************************************************************************\
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* Types of ARM we know about *
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\***************************************************************************/
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enum {
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ARM_v4_Prop = 0x01,
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ARM_v5_Prop = 0x02,
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ARM_v5e_Prop = 0x04,
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ARM_v6_Prop = 0x08,
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ARM_v7_Prop = 0x10,
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};
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/***************************************************************************\
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* The hardware vector addresses *
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\***************************************************************************/
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@ -167,7 +148,6 @@ enum {
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* Definitions of things in the emulator *
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\***************************************************************************/
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void ARMul_Reset(ARMul_State* state);
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ARMul_State* ARMul_NewState(ARMul_State* state);
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/***************************************************************************\
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* Definitions of things in the co-processor interface *
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@ -17,8 +17,6 @@ struct ARMul_State;
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bool AddOverflow(u32, u32, u32);
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bool SubOverflow(u32, u32, u32);
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void ARMul_SelectProcessor(ARMul_State*, unsigned);
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u32 AddWithCarry(u32, u32, u32, bool*, bool*);
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bool ARMul_AddOverflowQ(u32, u32);
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