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https://github.com/citra-emu/citra-nightly.git
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Merge pull request #3662 from wwylele/shader-hash-cache
shader: avoid recomputing hash for the same program
This commit is contained in:
commit
048b0fc0d3
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@ -451,6 +451,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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LOG_ERROR(HW_GPU, "Invalid GS program offset %u", offset);
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} else {
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g_state.gs.program_code[offset] = value;
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g_state.gs.MarkProgramCodeDirty();
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offset++;
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}
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break;
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@ -469,6 +470,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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LOG_ERROR(HW_GPU, "Invalid GS swizzle pattern offset %u", offset);
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} else {
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g_state.gs.swizzle_data[offset] = value;
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g_state.gs.MarkSwizzleDataDirty();
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offset++;
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}
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break;
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@ -518,8 +520,10 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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LOG_ERROR(HW_GPU, "Invalid VS program offset %u", offset);
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} else {
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g_state.vs.program_code[offset] = value;
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g_state.vs.MarkProgramCodeDirty();
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if (!g_state.regs.pipeline.gs_unit_exclusive_configuration) {
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g_state.gs.program_code[offset] = value;
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g_state.gs.MarkProgramCodeDirty();
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}
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offset++;
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}
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@ -539,8 +543,10 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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LOG_ERROR(HW_GPU, "Invalid VS swizzle pattern offset %u", offset);
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} else {
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g_state.vs.swizzle_data[offset] = value;
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g_state.vs.MarkSwizzleDataDirty();
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if (!g_state.regs.pipeline.gs_unit_exclusive_configuration) {
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g_state.gs.swizzle_data[offset] = value;
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g_state.gs.MarkSwizzleDataDirty();
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}
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offset++;
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}
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@ -12,6 +12,7 @@
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#include "common/assert.h"
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#include "common/common_funcs.h"
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#include "common/common_types.h"
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#include "common/hash.h"
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#include "common/vector_math.h"
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#include "video_core/pica_types.h"
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#include "video_core/regs_rasterizer.h"
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@ -173,27 +174,29 @@ struct GSUnitState : public UnitState {
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GSEmitter emitter;
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};
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struct ShaderSetup {
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struct {
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// The float uniforms are accessed by the shader JIT using SSE instructions, and are
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// therefore required to be 16-byte aligned.
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alignas(16) Math::Vec4<float24> f[96];
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struct Uniforms {
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// The float uniforms are accessed by the shader JIT using SSE instructions, and are
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// therefore required to be 16-byte aligned.
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alignas(16) Math::Vec4<float24> f[96];
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std::array<bool, 16> b;
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std::array<Math::Vec4<u8>, 4> i;
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} uniforms;
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std::array<bool, 16> b;
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std::array<Math::Vec4<u8>, 4> i;
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static size_t GetFloatUniformOffset(unsigned index) {
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return offsetof(ShaderSetup, uniforms.f) + index * sizeof(Math::Vec4<float24>);
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return offsetof(Uniforms, f) + index * sizeof(Math::Vec4<float24>);
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}
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static size_t GetBoolUniformOffset(unsigned index) {
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return offsetof(ShaderSetup, uniforms.b) + index * sizeof(bool);
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return offsetof(Uniforms, b) + index * sizeof(bool);
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}
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static size_t GetIntUniformOffset(unsigned index) {
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return offsetof(ShaderSetup, uniforms.i) + index * sizeof(Math::Vec4<u8>);
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return offsetof(Uniforms, i) + index * sizeof(Math::Vec4<u8>);
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}
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};
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struct ShaderSetup {
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Uniforms uniforms;
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std::array<u32, MAX_PROGRAM_CODE_LENGTH> program_code;
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std::array<u32, MAX_SWIZZLE_DATA_LENGTH> swizzle_data;
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@ -204,6 +207,36 @@ struct ShaderSetup {
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/// Used by the JIT, points to a compiled shader object.
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const void* cached_shader = nullptr;
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} engine_data;
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void MarkProgramCodeDirty() {
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program_code_hash_dirty = true;
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}
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void MarkSwizzleDataDirty() {
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swizzle_data_hash_dirty = true;
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}
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u64 GetProgramCodeHash() {
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if (program_code_hash_dirty) {
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program_code_hash = Common::ComputeHash64(&program_code, sizeof(program_code));
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program_code_hash_dirty = false;
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}
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return program_code_hash;
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}
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u64 GetSwizzleDataHash() {
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if (swizzle_data_hash_dirty) {
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swizzle_data_hash = Common::ComputeHash64(&swizzle_data, sizeof(swizzle_data));
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swizzle_data_hash_dirty = false;
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}
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return swizzle_data_hash;
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}
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private:
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bool program_code_hash_dirty = true;
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bool swizzle_data_hash_dirty = true;
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u64 program_code_hash = 0xDEADC0DE;
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u64 swizzle_data_hash = 0xDEADC0DE;
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};
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class ShaderEngine {
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@ -2,7 +2,6 @@
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/hash.h"
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#include "common/microprofile.h"
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#include "video_core/shader/shader.h"
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#include "video_core/shader/shader_jit_x64.h"
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@ -18,8 +17,8 @@ void JitX64Engine::SetupBatch(ShaderSetup& setup, unsigned int entry_point) {
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ASSERT(entry_point < MAX_PROGRAM_CODE_LENGTH);
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setup.engine_data.entry_point = entry_point;
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u64 code_hash = Common::ComputeHash64(&setup.program_code, sizeof(setup.program_code));
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u64 swizzle_hash = Common::ComputeHash64(&setup.swizzle_data, sizeof(setup.swizzle_data));
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u64 code_hash = setup.GetProgramCodeHash();
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u64 swizzle_hash = setup.GetSwizzleDataHash();
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u64 cache_key = code_hash ^ swizzle_hash;
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auto iter = cache.find(cache_key);
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@ -104,7 +104,7 @@ const JitFunction instr_table[64] = {
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// purposes, as documented below:
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/// Pointer to the uniform memory
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static const Reg64 SETUP = r9;
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static const Reg64 UNIFORMS = r9;
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/// The two 32-bit VS address offset registers set by the MOVA instruction
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static const Reg64 ADDROFFS_REG_0 = r10;
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static const Reg64 ADDROFFS_REG_1 = r11;
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@ -139,7 +139,7 @@ static const Xmm NEGBIT = xmm15;
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// Scratch registers, e.g., SRC1 and SCRATCH, have to be saved on the side if needed
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static const BitSet32 persistent_regs = BuildRegSet({
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// Pointers to register blocks
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SETUP,
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UNIFORMS,
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STATE,
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// Cached registers
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ADDROFFS_REG_0,
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@ -184,8 +184,8 @@ void JitShader::Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRe
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size_t src_offset;
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if (src_reg.GetRegisterType() == RegisterType::FloatUniform) {
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src_ptr = SETUP;
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src_offset = ShaderSetup::GetFloatUniformOffset(src_reg.GetIndex());
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src_ptr = UNIFORMS;
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src_offset = Uniforms::GetFloatUniformOffset(src_reg.GetIndex());
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} else {
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src_ptr = STATE;
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src_offset = UnitState::InputOffset(src_reg);
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@ -354,8 +354,8 @@ void JitShader::Compile_EvaluateCondition(Instruction instr) {
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}
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void JitShader::Compile_UniformCondition(Instruction instr) {
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size_t offset = ShaderSetup::GetBoolUniformOffset(instr.flow_control.bool_uniform_id);
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cmp(byte[SETUP + offset], 0);
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size_t offset = Uniforms::GetBoolUniformOffset(instr.flow_control.bool_uniform_id);
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cmp(byte[UNIFORMS + offset], 0);
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}
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BitSet32 JitShader::PersistentCallerSavedRegs() {
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@ -713,8 +713,8 @@ void JitShader::Compile_LOOP(Instruction instr) {
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// This decodes the fields from the integer uniform at index instr.flow_control.int_uniform_id.
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// The Y (LOOPCOUNT_REG) and Z (LOOPINC) component are kept multiplied by 16 (Left shifted by
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// 4 bits) to be used as an offset into the 16-byte vector registers later
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size_t offset = ShaderSetup::GetIntUniformOffset(instr.flow_control.int_uniform_id);
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mov(LOOPCOUNT, dword[SETUP + offset]);
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size_t offset = Uniforms::GetIntUniformOffset(instr.flow_control.int_uniform_id);
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mov(LOOPCOUNT, dword[UNIFORMS + offset]);
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mov(LOOPCOUNT_REG, LOOPCOUNT);
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shr(LOOPCOUNT_REG, 4);
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and_(LOOPCOUNT_REG, 0xFF0); // Y-component is the start
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@ -882,7 +882,7 @@ void JitShader::Compile(const std::array<u32, MAX_PROGRAM_CODE_LENGTH>* program_
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ABI_PushRegistersAndAdjustStack(*this, ABI_ALL_CALLEE_SAVED, 8, 16);
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mov(qword[rsp + 8], 0xFFFFFFFFFFFFFFFFULL);
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mov(SETUP, ABI_PARAM1);
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mov(UNIFORMS, ABI_PARAM1);
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mov(STATE, ABI_PARAM2);
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// Zero address/loop registers
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@ -34,7 +34,7 @@ public:
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JitShader();
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void Run(const ShaderSetup& setup, UnitState& state, unsigned offset) const {
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program(&setup, &state, instruction_labels[offset].getAddress());
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program(&setup.uniforms, &state, instruction_labels[offset].getAddress());
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}
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void Compile(const std::array<u32, MAX_PROGRAM_CODE_LENGTH>* program_code,
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