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Add Saddlv_V Inst. Improve Cnt_V, Dup_Gp & Ins_Gp Tests. Tuneup Cls_V & Clz_V Tests. (#720)
* Update PackageReferences. * Improve Cnt_V Test. Tuneup Cls_V & Clz_V Tests. Nit. * Nit. * Improve Dup_Gp & Ins_Gp Tests. * Update for Saddlv_V Inst. * Update for Saddlv_V Inst. * Update for Saddlv_V Inst.
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@ -2206,6 +2206,11 @@ namespace ChocolArm64.Instructions
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EmitAddLongPairwise(context, signed: true, accumulate: false);
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}
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public static void Saddlv_V(ILEmitterCtx context)
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{
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EmitVectorLongAcrossVectorOpSx(context, () => context.Emit(OpCodes.Add));
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}
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public static void Saddw_V(ILEmitterCtx context)
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{
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if (Optimizations.UseSse41)
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@ -3041,21 +3046,7 @@ namespace ChocolArm64.Instructions
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public static void Uaddlv_V(ILEmitterCtx context)
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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int bytes = op.GetBitsCount() >> 3;
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int elems = bytes >> op.Size;
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EmitVectorExtractZx(context, op.Rn, 0, op.Size);
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for (int index = 1; index < elems; index++)
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{
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EmitVectorExtractZx(context, op.Rn, index, op.Size);
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context.Emit(OpCodes.Add);
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}
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EmitScalarSet(context, op.Rd, op.Size + 1);
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EmitVectorLongAcrossVectorOpZx(context, () => context.Emit(OpCodes.Add));
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}
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public static void Uaddw_V(ILEmitterCtx context)
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@ -823,15 +823,29 @@ namespace ChocolArm64.Instructions
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public static void EmitVectorAcrossVectorOpSx(ILEmitterCtx context, Action emit)
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{
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EmitVectorAcrossVectorOp(context, emit, true);
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EmitVectorAcrossVectorOp(context, emit, signed: true, isLong: false);
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}
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public static void EmitVectorAcrossVectorOpZx(ILEmitterCtx context, Action emit)
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{
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EmitVectorAcrossVectorOp(context, emit, false);
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EmitVectorAcrossVectorOp(context, emit, signed: false, isLong: false);
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}
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public static void EmitVectorAcrossVectorOp(ILEmitterCtx context, Action emit, bool signed)
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public static void EmitVectorLongAcrossVectorOpSx(ILEmitterCtx context, Action emit)
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{
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EmitVectorAcrossVectorOp(context, emit, signed: true, isLong: true);
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}
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public static void EmitVectorLongAcrossVectorOpZx(ILEmitterCtx context, Action emit)
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{
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EmitVectorAcrossVectorOp(context, emit, signed: false, isLong: true);
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}
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public static void EmitVectorAcrossVectorOp(
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ILEmitterCtx context,
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Action emit,
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bool signed,
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bool isLong)
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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@ -847,7 +861,7 @@ namespace ChocolArm64.Instructions
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emit();
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}
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EmitScalarSet(context, op.Rd, op.Size);
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EmitScalarSet(context, op.Rd, isLong ? op.Size + 1 : op.Size);
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}
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public static void EmitVectorPairwiseOpF(ILEmitterCtx context, Action emit)
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@ -439,6 +439,8 @@ namespace ChocolArm64
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SetA64("0x001110<<100000011010xxxxxxxxxx", InstEmit.Sadalp_V, typeof(OpCodeSimd64));
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SetA64("0x001110<<1xxxxx000000xxxxxxxxxx", InstEmit.Saddl_V, typeof(OpCodeSimdReg64));
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SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V, typeof(OpCodeSimd64));
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SetA64("000011100x110000001110xxxxxxxxxx", InstEmit.Saddlv_V, typeof(OpCodeSimd64));
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SetA64("01001110<<110000001110xxxxxxxxxx", InstEmit.Saddlv_V, typeof(OpCodeSimd64));
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SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V, typeof(OpCodeSimdReg64));
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SetA64("x00111100x100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp, typeof(OpCodeSimdCvt64));
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SetA64(">00111100x000010>xxxxxxxxxxxxxxx", InstEmit.Scvtf_Gp_Fixed, typeof(OpCodeSimdCvt64));
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