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51 commits

Author SHA1 Message Date
LDj3SNuD ac5c1e5107 Add Saba_V, Sabal_V, Sabd_V, Sabdl_V, Uaba_V, Uabal_V; Update Uabd_V, Uabdl_V. Add 16 tests. (#204) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdHelper.cs

* Update Instructions.cs

* Update CpuTest.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs
 2018-06-30 12:40:41 -03:00
gdkchan f58651d009 Add support for the FMLA (by element/scalar) instruction (#187) 
* Add support for the FMLA (by element/scalar) instruction

* Fix encoding
 2018-06-28 20:51:38 -03:00
LDj3SNuD 86aae79b9d Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183) 
* Add files via upload

* Add files via upload

* Add files via upload

* CPE

* Add EmitSse42Crc32()

* Update CpuTestSimdCmp.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update CpuTestSimd.cs

* Update Instructions.cs
 2018-06-25 22:32:29 -03:00
gdkchan 216bcd7a65 Add REV16/32 (vector) instructions and fix REV64 2018-06-25 18:40:55 -03:00
Rygnus 3f81e1c795 Add opcodes SQXTUN_S and SQXTUN_V (#184) 
* Add SQXTUN_S and SQXTUN_V

Part 1/2 of commit

* Add SQXTUN_S and SQXTUN_V (2/2)

Part 2/2 of commit
 2018-06-25 14:23:46 -03:00
LDj3SNuD 7084bf58a4 Add Cmeq_S, Cmge_S, Cmgt_S, Cmhi_S, Cmhs_S, Cmle_S, Cmlt_S (Reg, Zero) & Cmtst_S compare instructions. Add 22 compare tests (Scalar, Vector). Add Eor_V, Not_V tests. (#171) 
* Add files via upload

* Add files via upload

* Delete CpuTestScalar.cs

* Update CpuTestSimdArithmetic.cs
 2018-06-18 14:55:26 -03:00
gdkchan ed80772500 Add the FADDP (scalar) instruction 2018-06-18 00:41:28 -03:00
Lordmau5 d99c39b448 Implement Fabs_V (#146) 2018-06-12 09:29:16 -03:00
gdkchan 09b194aaf0 Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now) 2018-05-26 17:50:47 -03:00
gdkchan 173c3e616d Add scalar variants of FCVTZS/FCVTZU, fix a issue on Ryushader 2018-05-18 14:44:49 -03:00
LDj3SNuD f9b17f86c1 Add Sqxtn_S, Sqxtn_V, Uqxtn_S, Uqxtn_V instructions and Tests (6). (#110) 
* Update ILGeneratorEx.cs

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update CpuTest.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdArithmetic.cs
 2018-04-29 20:39:58 -03:00
LDj3SNuD 3f3844583f Update AOpCodeTable.cs (#108) 2018-04-25 23:26:41 -03:00
LDj3SNuD 966f6b7203 Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdLogical.cs

* Update AInstEmitSimdArithmetic.cs

* Update ASoftFallback.cs

* Update AInstEmitAlu.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update CpuTestSimdReg.cs

* Update CpuTestSimd.cs
 2018-04-25 23:20:22 -03:00
LDj3SNuD 9c43b14421 Fix Addp_S in AOpCodeTable. Add 5 Tests: ADDP (scalar), ADDP (vector), ADDV. (#96) 
* Update AOpCodeTable.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update Instructions.cs

* Revert "Started to work in improving the sync primitives"
 2018-04-21 16:15:04 -03:00
LDj3SNuD bc4ada20c7 Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update Bits.cs

* Create CpuTestSimd.cs

* Create CpuTestSimdReg.cs

* Update CpuTestSimd.cs

Provide a better supply of input values for the 20 Simd Tests.

* Update CpuTestSimdReg.cs

Provide a better supply of input values for the 20 Simd Tests.

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs
 2018-04-20 12:40:15 -03:00
MS-DOS1999 b0368079fb Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89) 2018-04-19 00:22:12 -03:00
LDj3SNuD 5a383d86b1 Add ABS (scalar & vector), ADD (scalar), NEG (scalar) instructions. (#88) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update AOpCodeTable.cs
 2018-04-18 10:56:27 -03:00
LDj3SNuD 16660f177e Add TRN1 & TRN2 (vector) instructions. Add 4 simple tests (4S, 8B). (#77) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdMove.cs

* Update CpuTestSimdMove.cs

* Update AInstEmitSimdMove.cs

* Update CpuTestSimdMove.cs
 2018-04-12 11:52:00 -03:00
LDj3SNuD 65c490f350 Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & vector) instructions. Add 5 simple tests. (#74) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdHelper.cs

* Update CpuTestSimdArithmetic.cs

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs
 2018-04-08 16:08:57 -03:00
gdkchan 35ff142104 Add FMLS (vector) instruction 2018-04-06 01:41:54 -03:00
gdkchan b73b522835 Add FRSQRTS and FCM* instructions 2018-04-05 23:28:12 -03:00
Merry c4c247deb4 Implement Frsqrte_S (#72) 
* Implement Frsqrte_S

* Implement Frsqrte_V

* Add Frsqrte_S test
 2018-04-05 20:36:19 -03:00
gdkchan ee98d50e17 Add Faddp (vector) instruction 2018-04-04 22:13:10 -03:00
gdkchan 5c565ff1be Add PRFM (unscaled) instruction 2018-04-04 18:10:20 -03:00
gdkchan 9037055c10 Add FNEG (vector) instruction 2018-04-04 16:36:07 -03:00
gdkchan 67184bcff7 Enable all ld/st (single structure) instructions 2018-03-30 18:06:02 -03:00
gdkchan 94b3eb96a9 Add BIT instruction 2018-03-30 16:46:00 -03:00
gdkchan e580ef1bcf Add UABD instruction 2018-03-30 16:30:23 -03:00
gdkchan 7423ff43a5 Add UABDL instruction 2018-03-30 16:16:16 -03:00
gdkchan 442904a5ed Add UADDL instruction 2018-03-30 15:55:28 -03:00
gdkchan 0a7aaa345c Add UHADD instruction 2018-03-30 12:37:07 -03:00
gdkchan 4f92aa0ee2 Add FNMADD instruction 2018-03-24 00:28:23 -03:00
LDj3SNuD eca2d19d8d Add Cls Instruction. (#67) 
* Update AInstEmitAlu.cs

* Update ASoftFallback.cs

* Update AOpCodeTable.cs
 2018-03-23 22:06:05 -03:00
MS-DOS1999 9e124e75f4 Add Frint Instructions and Tests (#62) 
* add 'ADC 32bit and Overflow' test

* Add WZR/WSP tests

* fix ADC and ADDS

* add ADCS test

* add SBCS test

* indent my code and delete comment

* '/' <- i hate you x)

* remove spacebar char

* remove false tab

* add frintx_S test

* update frintx_S test

* add ASRV test

* fix new line

* fix PR

* fix indent

* Add add_V tests

* work on Frintx_V

* Add Frintx_V Instruction

* add some instruction and test

* Syntax + indent

* Delete Console Write

* Delete Console Write 2

* CR del

* Skip NaNs tests

* Skip NaNs tests 2

* Fix errors 1

* Fix errors 2
 2018-03-23 07:40:23 -03:00
gdkchan c8cd538f15 Add BFI instruction, even more audout fixes 2018-03-16 00:42:44 -03:00
gdkchan f4f5d244f1 Add MLA (vector by element), fixes some cases of MUL (vector by element)? 2018-03-15 22:36:47 -03:00
gdkchan bb0a2aa0f1 Add CRC32 instruction and SLI (vector) 2018-03-14 00:12:05 -03:00
gdkchan f43e430f6c Fix EmitScalarUnaryOpF and add SSRA (vector) 2018-03-10 00:00:31 -03:00
gdkchan 4f9faf3e32 Add FRINTM (vector) instruction 2018-03-09 23:41:05 -03:00
gdkchan e182fb74f2 Add SHLL instruction 2018-03-09 23:28:38 -03:00
gdkchan 9376a61229 Add SMLAL (vector), fix EXT instruction 2018-03-06 21:36:49 -03:00
gdkchan 3020de224e Add MUL (vector by element), fix FCVTN, make svcs use MakeError too 2018-03-05 16:18:37 -03:00
gdkchan 3860ba6521 Add FCVTL and FCVTN instruction (no Half support yet), stub SvcClearEvent 2018-03-05 12:58:56 -03:00
gdkchan 6dd9cdf337 Fix REV64 (vector) instruction 2018-03-02 20:24:16 -03:00
gdkchan 589d90785a Add REV64 (vector) instruction 2018-03-02 20:03:28 -03:00
gdkchan fc105218a2 Add EXT, CMTST (vector) and UMULL (vector) instructions 2018-03-02 19:23:38 -03:00
gdkchan d2f3bd3526 Add FABD (scalar), ADCS, SBCS instructions, update config with better default control mappings, update readme with the new mappings 2018-02-24 18:47:08 -03:00
gdkchan 7e68a890a1 Fix cpu issue with cmp optimization, add HINT and FRINTX (scalar) instructions, fix for NvFlinger sometimes missing free buffers 2018-02-24 11:19:28 -03:00
gdkchan ce64871c71 Map heap on heap base region, fix for thread start on homebrew, add FCVTMU and FCVTPU (general) instructions, fix FMOV (higher 64 bits) encodings, improve emit code for FCVT* (general) instructions 2018-02-23 21:59:38 -03:00
gdkchan 0268145fca Add FRINTP instruction, fix opcode ctor call method creation with multithreading 2018-02-22 16:26:11 -03:00