ryujinx/ChocolArm64
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A C# ARM64 emulator that works translating ARM code to CIL
177 commits 1 branch 0 tags 888 KiB
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LDj3SNuD 57659ad0d2 Add Cmeq_V, Cmge_V, Cmgt_V, Cmle_V & Cmlt_V (Z & ~Z) Sse opt.. (#646) 
* Follow-up (Neg_V).

* Follow-up (Not_V & Orn_V).

* Add Cmeq/ge/gt/le/lt_V (Z & ~Z) Sse opt..

* Add EmitLd/Stvectmp2/3.

* Remove Dup (EmitVectorPairwiseSseOrSse2OpF).

* Remove Dup (EmitFcmpOrFcmpe).

* Add S/Uabd/l_V Sse opt.. Remove Dup (Srhadd_V).

* Nit.
2019-03-25 10:23:27 +11:00
Decoders Implement fixed-point variant of the UCVTF and SCVTF instructions (#578) 2019-02-23 20:52:48 -03:00
Events Optimize address translation and write tracking on the MMU (#571) 2019-02-24 18:24:35 +11:00
Instructions Add Cmeq_V, Cmge_V, Cmgt_V, Cmle_V & Cmlt_V (Z & ~Z) Sse opt.. (#646) 2019-03-25 10:23:27 +11:00
Memory Optimize address translation and write tracking on the MMU (#571) 2019-02-24 18:24:35 +11:00
State ARM exclusive monitor and multicore fixes (#589) 2019-02-19 10:52:06 +11:00
Translation Add Tbl_V Sse opt. with Tests. (#651) 2019-03-23 15:50:19 -03:00
ChocolArm64.csproj ARM exclusive monitor and multicore fixes (#589) 2019-02-19 10:52:06 +11:00
CpuThread.cs ARM exclusive monitor and multicore fixes (#589) 2019-02-19 10:52:06 +11:00
OpCodeTable.cs Implement fixed-point variant of the UCVTF and SCVTF instructions (#578) 2019-02-23 20:52:48 -03:00
Optimizations.cs Misc. CPU optimizations (#575) 2019-02-28 13:03:31 +11:00