2021-10-12 20:35:31 +00:00
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using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.Translation;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Instructions
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{
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static partial class InstEmit
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{
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2021-10-17 20:02:20 +00:00
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public static void ShfLR(EmitterContext context)
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{
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InstShfLR op = context.GetOp<InstShfLR>();
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var srcA = GetSrcReg(context, op.SrcA);
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var srcB = GetSrcReg(context, op.SrcB);
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var srcC = GetSrcReg(context, op.SrcC);
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EmitShf(context, op.MaxShift, srcA, srcB, srcC, op.Dest, op.M, left: true, op.WriteCC);
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}
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public static void ShfRR(EmitterContext context)
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{
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InstShfRR op = context.GetOp<InstShfRR>();
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var srcA = GetSrcReg(context, op.SrcA);
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var srcB = GetSrcReg(context, op.SrcB);
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var srcC = GetSrcReg(context, op.SrcC);
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EmitShf(context, op.MaxShift, srcA, srcB, srcC, op.Dest, op.M, left: false, op.WriteCC);
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}
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public static void ShfLI(EmitterContext context)
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{
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InstShfLI op = context.GetOp<InstShfLI>();
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var srcA = GetSrcReg(context, op.SrcA);
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var srcB = Const(op.Imm6);
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var srcC = GetSrcReg(context, op.SrcC);
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EmitShf(context, op.MaxShift, srcA, srcB, srcC, op.Dest, op.M, left: true, op.WriteCC);
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}
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public static void ShfRI(EmitterContext context)
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{
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InstShfRI op = context.GetOp<InstShfRI>();
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var srcA = GetSrcReg(context, op.SrcA);
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var srcB = Const(op.Imm6);
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var srcC = GetSrcReg(context, op.SrcC);
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EmitShf(context, op.MaxShift, srcA, srcB, srcC, op.Dest, op.M, left: false, op.WriteCC);
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}
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2021-10-12 20:35:31 +00:00
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public static void ShlR(EmitterContext context)
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{
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InstShlR op = context.GetOp<InstShlR>();
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EmitShl(context, GetSrcReg(context, op.SrcA), GetSrcReg(context, op.SrcB), op.Dest, op.M);
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}
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public static void ShlI(EmitterContext context)
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{
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InstShlI op = context.GetOp<InstShlI>();
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EmitShl(context, GetSrcReg(context, op.SrcA), GetSrcImm(context, Imm20ToSInt(op.Imm20)), op.Dest, op.M);
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}
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public static void ShlC(EmitterContext context)
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{
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InstShlC op = context.GetOp<InstShlC>();
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EmitShl(context, GetSrcReg(context, op.SrcA), GetSrcCbuf(context, op.CbufSlot, op.CbufOffset), op.Dest, op.M);
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}
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public static void ShrR(EmitterContext context)
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{
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InstShrR op = context.GetOp<InstShrR>();
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var srcA = GetSrcReg(context, op.SrcA);
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var srcB = GetSrcReg(context, op.SrcB);
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EmitShr(context, srcA, srcB, op.Dest, op.M, op.Brev, op.Signed);
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}
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public static void ShrI(EmitterContext context)
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{
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InstShrI op = context.GetOp<InstShrI>();
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var srcA = GetSrcReg(context, op.SrcA);
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var srcB = GetSrcImm(context, Imm20ToSInt(op.Imm20));
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EmitShr(context, srcA, srcB, op.Dest, op.M, op.Brev, op.Signed);
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}
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public static void ShrC(EmitterContext context)
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{
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InstShrC op = context.GetOp<InstShrC>();
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var srcA = GetSrcReg(context, op.SrcA);
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var srcB = GetSrcCbuf(context, op.CbufSlot, op.CbufOffset);
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EmitShr(context, srcA, srcB, op.Dest, op.M, op.Brev, op.Signed);
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}
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2021-10-17 20:02:20 +00:00
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private static void EmitShf(
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EmitterContext context,
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MaxShift maxShift,
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Operand srcA,
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Operand srcB,
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Operand srcC,
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int rd,
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bool mask,
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bool left,
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bool writeCC)
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{
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bool isLongShift = maxShift == MaxShift.U64 || maxShift == MaxShift.S64;
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bool signedShift = maxShift == MaxShift.S64;
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int maxShiftConst = isLongShift ? 64 : 32;
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if (mask)
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{
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srcB = context.BitwiseAnd(srcB, Const(maxShiftConst - 1));
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}
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Operand res;
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if (left)
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{
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// res = (C << B) | (A >> (32 - B))
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res = context.ShiftLeft(srcC, srcB);
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res = context.BitwiseOr(res, context.ShiftRightU32(srcA, context.ISubtract(Const(32), srcB)));
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if (isLongShift)
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{
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// res = B >= 32 ? A << (B - 32) : res
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Operand lowerShift = context.ShiftLeft(srcA, context.ISubtract(srcB, Const(32)));
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Operand shiftGreaterThan31 = context.ICompareGreaterOrEqualUnsigned(srcB, Const(32));
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res = context.ConditionalSelect(shiftGreaterThan31, lowerShift, res);
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}
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}
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else
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{
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// res = (A >> B) | (C << (32 - B))
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res = context.ShiftRightU32(srcA, srcB);
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res = context.BitwiseOr(res, context.ShiftLeft(srcC, context.ISubtract(Const(32), srcB)));
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if (isLongShift)
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{
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// res = B >= 32 ? C >> (B - 32) : res
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Operand upperShift = signedShift
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? context.ShiftRightS32(srcC, context.ISubtract(srcB, Const(32)))
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: context.ShiftRightU32(srcC, context.ISubtract(srcB, Const(32)));
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Operand shiftGreaterThan31 = context.ICompareGreaterOrEqualUnsigned(srcB, Const(32));
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res = context.ConditionalSelect(shiftGreaterThan31, upperShift, res);
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}
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}
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if (!mask)
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{
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// Clamped shift value.
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Operand isLessThanMax = context.ICompareLessUnsigned(srcB, Const(maxShiftConst));
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res = context.ConditionalSelect(isLessThanMax, res, Const(0));
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}
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context.Copy(GetDest(rd), res);
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if (writeCC)
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{
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InstEmitAluHelper.SetZnFlags(context, res, writeCC);
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}
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// TODO: X.
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}
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2021-10-12 20:35:31 +00:00
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private static void EmitShl(EmitterContext context, Operand srcA, Operand srcB, int rd, bool mask)
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{
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if (mask)
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{
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srcB = context.BitwiseAnd(srcB, Const(0x1f));
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}
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Operand res = context.ShiftLeft(srcA, srcB);
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if (!mask)
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{
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// Clamped shift value.
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Operand isLessThan32 = context.ICompareLessUnsigned(srcB, Const(32));
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res = context.ConditionalSelect(isLessThan32, res, Const(0));
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}
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// TODO: X, CC.
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context.Copy(GetDest(rd), res);
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}
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private static void EmitShr(
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EmitterContext context,
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Operand srcA,
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Operand srcB,
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int rd,
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bool mask,
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bool bitReverse,
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bool isSigned)
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{
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if (bitReverse)
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{
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srcA = context.BitfieldReverse(srcA);
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}
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if (mask)
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{
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srcB = context.BitwiseAnd(srcB, Const(0x1f));
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}
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Operand res = isSigned
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? context.ShiftRightS32(srcA, srcB)
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: context.ShiftRightU32(srcA, srcB);
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if (!mask)
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{
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// Clamped shift value.
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Operand resShiftBy32;
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if (isSigned)
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{
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resShiftBy32 = context.ShiftRightS32(srcA, Const(31));
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}
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else
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{
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resShiftBy32 = Const(0);
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}
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Operand isLessThan32 = context.ICompareLessUnsigned(srcB, Const(32));
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res = context.ConditionalSelect(isLessThan32, res, resShiftBy32);
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}
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// TODO: X, CC.
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context.Copy(GetDest(rd), res);
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}
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}
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}
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