2019-07-02 02:39:22 +00:00
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// ReSharper disable InconsistentNaming
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New shader translator implementation (#654)
* Start implementing a new shader translator
* Fix shift instructions and a typo
* Small refactoring on StructuredProgram, move RemovePhis method to a separate class
* Initial geometry shader support
* Implement TLD4
* Fix -- There's no negation on FMUL32I
* Add constant folding and algebraic simplification optimizations, nits
* Some leftovers from constant folding
* Avoid cast for constant assignments
* Add a branch elimination pass, and misc small fixes
* Remove redundant branches, add expression propagation and other improvements on the code
* Small leftovers -- add missing break and continue, remove unused properties, other improvements
* Add null check to handle empty block cases on block visitor
* Add HADD2 and HMUL2 half float shader instructions
* Optimize pack/unpack sequences, some fixes related to half float instructions
* Add TXQ, TLD, TLDS and TLD4S shader texture instructions, and some support for bindless textures, some refactoring on codegen
* Fix copy paste mistake that caused RZ to be ignored on the AST instruction
* Add workaround for conditional exit, and fix half float instruction with constant buffer
* Add missing 0.0 source for TLDS.LZ variants
* Simplify the switch for TLDS.LZ
* Texture instructions related fixes
* Implement the HFMA instruction, and some misc. fixes
* Enable constant folding on UnpackHalf2x16 instructions
* Refactor HFMA to use OpCode* for opcode decoding rather than on the helper methods
* Remove the old shader translator
* Remove ShaderDeclInfo and other unused things
* Add dual vertex shader support
* Add ShaderConfig, used to pass shader type and maximum cbuffer size
* Move and rename some instruction enums
* Move texture instructions into a separate file
* Move operand GetExpression and locals management to OperandManager
* Optimize opcode decoding using a simple list and binary search
* Add missing condition for do-while on goto elimination
* Misc. fixes on texture instructions
* Simplify TLDS switch
* Address PR feedback, and a nit
2019-04-17 23:57:08 +00:00
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using Ryujinx.Graphics.Shader.Instructions;
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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class OpCodeTextureScalar : OpCode
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{
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#region "Component mask LUT"
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private const int ____ = 0x0;
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private const int R___ = 0x1;
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private const int _G__ = 0x2;
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private const int RG__ = 0x3;
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private const int __B_ = 0x4;
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private const int RGB_ = 0x7;
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private const int ___A = 0x8;
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private const int R__A = 0x9;
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private const int _G_A = 0xa;
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private const int RG_A = 0xb;
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private const int __BA = 0xc;
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private const int R_BA = 0xd;
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private const int _GBA = 0xe;
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private const int RGBA = 0xf;
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private static int[,] _maskLut = new int[,]
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{
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{ R___, _G__, __B_, ___A, RG__, R__A, _G_A, __BA },
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{ RGB_, RG_A, R_BA, _GBA, RGBA, ____, ____, ____ }
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};
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#endregion
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public Register Rd0 { get; }
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public Register Ra { get; }
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public Register Rb { get; }
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public Register Rd1 { get; }
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public int Immediate { get; }
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public int ComponentMask { get; }
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protected int RawType;
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public bool IsFp16 { get; }
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public OpCodeTextureScalar(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
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{
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Rd0 = new Register(opCode.Extract(0, 8), RegisterType.Gpr);
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Ra = new Register(opCode.Extract(8, 8), RegisterType.Gpr);
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Rb = new Register(opCode.Extract(20, 8), RegisterType.Gpr);
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Rd1 = new Register(opCode.Extract(28, 8), RegisterType.Gpr);
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Immediate = opCode.Extract(36, 13);
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int compSel = opCode.Extract(50, 3);
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RawType = opCode.Extract(53, 4);
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IsFp16 = !opCode.Extract(59);
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ComponentMask = _maskLut[Rd1.IsRZ ? 0 : 1, compSel];
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}
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}
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}
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