Replace CacheResourceWrite with more general "precise" write (#2684)

* Replace CacheResourceWrite with more general "precise" write

The goal of CacheResourceWrite was to notify GPU resources when they were modified directly, by looking up the modified address/size in a structure and calling a method on each resource. The downside of this is that each resource cache has to be queried individually, they all have to implement their own way to do this, and it can only signal to resources using the same PhysicalMemory instance.

This PR adds the ability to signal a write as "precise" on the tracking, which signals a special handler (if present) which can be used to avoid unnecessary flush actions, or maybe even more. For buffers, precise writes specifically do not flush, and instead punch a hole in the modified range list to indicate that the data on GPU has been replaced.

The downside is that precise actions must ignore the page protection bits and always signal - as they need to notify the target resource to ignore the sequence number optimization.

I had to reintroduce the sequence number increment after I2M, as removing it was causing issues in rabbids kingdom battle. However - all resources modified by I2M are notified directly to lower their sequence number, so the problem is likely that another unrelated resource is not being properly updated. Thankfully, doing this does not affect performance in the games I tested.

This should fix regressions from #2624. Test any games that were broken by that. (RF4, rabbids kingdom battle)

I've also added a sequence number increment to ThreedClass.IncrementSyncpoint, as it seems to fix buffer corruption in OpenGL homebrew. (this was a regression from removing sequence number increment from constant buffer update - another unrelated resource thing)

* Add tests.

* Add XML docs for GpuRegionHandle

* Skip UpdateProtection if only precise actions were called

This allows precise actions to skip reprotection costs.
This commit is contained in:
riperiperi 2021-09-29 01:27:03 +01:00 committed by GitHub
parent b6e093b0fc
commit d92fff541b
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
31 changed files with 338 additions and 53 deletions

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@ -70,6 +70,7 @@ namespace ARMeilleure.Memory
/// <param name="va">Virtual address of the region</param> /// <param name="va">Virtual address of the region</param>
/// <param name="size">Size of the region</param> /// <param name="size">Size of the region</param>
/// <param name="write">True if the region was written, false if read</param> /// <param name="write">True if the region was written, false if read</param>
void SignalMemoryTracking(ulong va, ulong size, bool write); /// <param name="precise">True if the access is precise, false otherwise</param>
void SignalMemoryTracking(ulong va, ulong size, bool write, bool precise = false);
} }
} }

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@ -202,7 +202,7 @@ namespace ARMeilleure.Signal
// Call the tracking action, with the pointer's relative offset to the base address. // Call the tracking action, with the pointer's relative offset to the base address.
Operand trackingActionPtr = context.Load(OperandType.I64, Const((ulong)signalStructPtr + rangeBaseOffset + 20)); Operand trackingActionPtr = context.Load(OperandType.I64, Const((ulong)signalStructPtr + rangeBaseOffset + 20));
context.Call(trackingActionPtr, OperandType.I32, offset, Const(PageSize), isWrite); context.Call(trackingActionPtr, OperandType.I32, offset, Const(PageSize), isWrite, Const(0));
context.Branch(endLabel); context.Branch(endLabel);

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@ -8,7 +8,7 @@ namespace Ryujinx.Cpu
{ {
class MemoryEhMeilleure : IDisposable class MemoryEhMeilleure : IDisposable
{ {
private delegate bool TrackingEventDelegate(ulong address, ulong size, bool write); private delegate bool TrackingEventDelegate(ulong address, ulong size, bool write, bool precise = false);
private readonly MemoryBlock _addressSpace; private readonly MemoryBlock _addressSpace;
private readonly MemoryTracking _tracking; private readonly MemoryTracking _tracking;

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@ -567,10 +567,16 @@ namespace Ryujinx.Cpu
} }
/// <inheritdoc/> /// <inheritdoc/>
public void SignalMemoryTracking(ulong va, ulong size, bool write) public void SignalMemoryTracking(ulong va, ulong size, bool write, bool precise = false)
{ {
AssertValidAddressAndSize(va, size); AssertValidAddressAndSize(va, size);
if (precise)
{
Tracking.VirtualMemoryEvent(va, size, write, precise: true);
return;
}
// We emulate guard pages for software memory access. This makes for an easy transition to // We emulate guard pages for software memory access. This makes for an easy transition to
// tracking using host guard pages in future, but also supporting platforms where this is not possible. // tracking using host guard pages in future, but also supporting platforms where this is not possible.

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@ -405,10 +405,16 @@ namespace Ryujinx.Cpu
/// <remarks> /// <remarks>
/// This function also validates that the given range is both valid and mapped, and will throw if it is not. /// This function also validates that the given range is both valid and mapped, and will throw if it is not.
/// </remarks> /// </remarks>
public void SignalMemoryTracking(ulong va, ulong size, bool write) public void SignalMemoryTracking(ulong va, ulong size, bool write, bool precise = false)
{ {
AssertValidAddressAndSize(va, size); AssertValidAddressAndSize(va, size);
if (precise)
{
Tracking.VirtualMemoryEvent(va, size, write, precise: true);
return;
}
// Software table, used for managed memory tracking. // Software table, used for managed memory tracking.
int pages = GetPagesCount(va, size, out _); int pages = GetPagesCount(va, size, out _);

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@ -22,6 +22,7 @@ namespace Ryujinx.Cpu.Tracking
public void QueryModified(ulong address, ulong size, Action<ulong, ulong> modifiedAction) => _impl.QueryModified(address, size, modifiedAction); public void QueryModified(ulong address, ulong size, Action<ulong, ulong> modifiedAction) => _impl.QueryModified(address, size, modifiedAction);
public void QueryModified(ulong address, ulong size, Action<ulong, ulong> modifiedAction, int sequenceNumber) => _impl.QueryModified(address, size, modifiedAction, sequenceNumber); public void QueryModified(ulong address, ulong size, Action<ulong, ulong> modifiedAction, int sequenceNumber) => _impl.QueryModified(address, size, modifiedAction, sequenceNumber);
public void RegisterAction(ulong address, ulong size, RegionSignal action) => _impl.RegisterAction(address, size, action); public void RegisterAction(ulong address, ulong size, RegionSignal action) => _impl.RegisterAction(address, size, action);
public void RegisterPreciseAction(ulong address, ulong size, PreciseRegionSignal action) => _impl.RegisterPreciseAction(address, size, action);
public void SignalWrite() => _impl.SignalWrite(); public void SignalWrite() => _impl.SignalWrite();
} }
} }

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@ -23,6 +23,7 @@ namespace Ryujinx.Cpu.Tracking
public void ForceDirty() => _impl.ForceDirty(); public void ForceDirty() => _impl.ForceDirty();
public IRegionHandle GetHandle() => _impl; public IRegionHandle GetHandle() => _impl;
public void RegisterAction(RegionSignal action) => _impl.RegisterAction(action); public void RegisterAction(RegionSignal action) => _impl.RegisterAction(action);
public void RegisterPreciseAction(PreciseRegionSignal action) => _impl.RegisterPreciseAction(action);
public void RegisterDirtyEvent(Action action) => _impl.RegisterDirtyEvent(action); public void RegisterDirtyEvent(Action action) => _impl.RegisterDirtyEvent(action);
public void Reprotect(bool asDirty = false) => _impl.Reprotect(asDirty); public void Reprotect(bool asDirty = false) => _impl.Reprotect(asDirty);

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@ -17,6 +17,7 @@ namespace Ryujinx.Cpu.Tracking
public void Dispose() => _impl.Dispose(); public void Dispose() => _impl.Dispose();
public void ForceDirty(ulong address, ulong size) => _impl.ForceDirty(address, size); public void ForceDirty(ulong address, ulong size) => _impl.ForceDirty(address, size);
public void RegisterAction(RegionSignal action) => _impl.RegisterAction(action); public void RegisterAction(RegionSignal action) => _impl.RegisterAction(action);
public void RegisterPreciseAction(PreciseRegionSignal action) => _impl.RegisterPreciseAction(action);
public void QueryModified(Action<ulong, ulong> modifiedAction) => _impl.QueryModified(modifiedAction); public void QueryModified(Action<ulong, ulong> modifiedAction) => _impl.QueryModified(modifiedAction);
public void QueryModified(ulong address, ulong size, Action<ulong, ulong> modifiedAction) => _impl.QueryModified(address, size, modifiedAction); public void QueryModified(ulong address, ulong size, Action<ulong, ulong> modifiedAction) => _impl.QueryModified(address, size, modifiedAction);
public void QueryModified(ulong address, ulong size, Action<ulong, ulong> modifiedAction, int sequenceNumber) => _impl.QueryModified(address, size, modifiedAction, sequenceNumber); public void QueryModified(ulong address, ulong size, Action<ulong, ulong> modifiedAction, int sequenceNumber) => _impl.QueryModified(address, size, modifiedAction, sequenceNumber);

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@ -171,7 +171,8 @@ namespace Ryujinx.Graphics.Gpu.Engine.InlineToMemory
if (_isLinear && _lineCount == 1) if (_isLinear && _lineCount == 1)
{ {
memoryManager.Physical.CacheResourceWrite(memoryManager, _dstGpuVa, data); memoryManager.WriteTrackedResource(_dstGpuVa, data);
_context.AdvanceSequence();
} }
else else
{ {

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@ -211,6 +211,7 @@ namespace Ryujinx.Graphics.Gpu.Engine.Threed
{ {
uint syncpointId = (uint)argument & 0xFFFF; uint syncpointId = (uint)argument & 0xFFFF;
_context.AdvanceSequence();
_context.CreateHostSyncIfNeeded(); _context.CreateHostSyncIfNeeded();
_context.Renderer.UpdateCounters(); // Poll the query counters, the game may want an updated result. _context.Renderer.UpdateCounters(); // Poll the query counters, the game may want an updated result.
_context.Synchronization.IncrementSyncpoint(syncpointId); _context.Synchronization.IncrementSyncpoint(syncpointId);

View file

@ -15,6 +15,7 @@ namespace Ryujinx.Graphics.Gpu.Image
protected GpuContext Context; protected GpuContext Context;
protected PhysicalMemory PhysicalMemory; protected PhysicalMemory PhysicalMemory;
protected int SequenceNumber;
protected T1[] Items; protected T1[] Items;
protected T2[] DescriptorCache; protected T2[] DescriptorCache;
@ -64,6 +65,7 @@ namespace Ryujinx.Graphics.Gpu.Image
Size = size; Size = size;
_memoryTracking = physicalMemory.BeginGranularTracking(address, size); _memoryTracking = physicalMemory.BeginGranularTracking(address, size);
_memoryTracking.RegisterPreciseAction(address, size, PreciseAction);
_modifiedDelegate = RegionModified; _modifiedDelegate = RegionModified;
} }
@ -116,6 +118,23 @@ namespace Ryujinx.Graphics.Gpu.Image
InvalidateRangeImpl(mAddress, mSize); InvalidateRangeImpl(mAddress, mSize);
} }
/// <summary>
/// An action to be performed when a precise memory access occurs to this resource.
/// Makes sure that the dirty flags are checked.
/// </summary>
/// <param name="address">Address of the memory action</param>
/// <param name="size">Size in bytes</param>
/// <param name="write">True if the access was a write, false otherwise</param>
private bool PreciseAction(ulong address, ulong size, bool write)
{
if (write && Context.SequenceNumber == SequenceNumber)
{
SequenceNumber--;
}
return false;
}
protected abstract void InvalidateRangeImpl(ulong address, ulong size); protected abstract void InvalidateRangeImpl(ulong address, ulong size);
protected abstract void Delete(T1 item); protected abstract void Delete(T1 item);

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@ -7,8 +7,6 @@ namespace Ryujinx.Graphics.Gpu.Image
/// </summary> /// </summary>
class SamplerPool : Pool<Sampler, SamplerDescriptor> class SamplerPool : Pool<Sampler, SamplerDescriptor>
{ {
private int _sequenceNumber;
/// <summary> /// <summary>
/// Constructs a new instance of the sampler pool. /// Constructs a new instance of the sampler pool.
/// </summary> /// </summary>
@ -30,9 +28,9 @@ namespace Ryujinx.Graphics.Gpu.Image
return null; return null;
} }
if (_sequenceNumber != Context.SequenceNumber) if (SequenceNumber != Context.SequenceNumber)
{ {
_sequenceNumber = Context.SequenceNumber; SequenceNumber = Context.SequenceNumber;
SynchronizeMemory(); SynchronizeMemory();
} }

View file

@ -99,18 +99,6 @@ namespace Ryujinx.Graphics.Gpu.Image
return TextureScaleMode.Blacklisted; return TextureScaleMode.Blacklisted;
} }
/// <summary>
/// Determines if any texture exists within the target memory range.
/// </summary>
/// <param name="memoryManager">The GPU memory manager</param>
/// <param name="gpuVa">GPU virtual address to search for textures</param>
/// <param name="size">The size of the range</param>
/// <returns>True if any texture exists in the range, false otherwise</returns>
public bool IsTextureInRange(MemoryManager memoryManager, ulong gpuVa, ulong size)
{
return _textures.FindOverlaps(memoryManager.GetPhysicalRegions(gpuVa, size), ref _textureOverlaps) != 0;
}
/// <summary> /// <summary>
/// Determines if a given texture is "safe" for upscaling from its info. /// Determines if a given texture is "safe" for upscaling from its info.
/// Note that this is different from being compatible - this elilinates targets that would have detrimental effects when scaled. /// Note that this is different from being compatible - this elilinates targets that would have detrimental effects when scaled.

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@ -12,7 +12,6 @@ namespace Ryujinx.Graphics.Gpu.Image
/// </summary> /// </summary>
class TexturePool : Pool<Texture, TextureDescriptor> class TexturePool : Pool<Texture, TextureDescriptor>
{ {
private int _sequenceNumber;
private readonly GpuChannel _channel; private readonly GpuChannel _channel;
private readonly ConcurrentQueue<Texture> _dereferenceQueue = new ConcurrentQueue<Texture>(); private readonly ConcurrentQueue<Texture> _dereferenceQueue = new ConcurrentQueue<Texture>();
@ -45,9 +44,9 @@ namespace Ryujinx.Graphics.Gpu.Image
return null; return null;
} }
if (_sequenceNumber != Context.SequenceNumber) if (SequenceNumber != Context.SequenceNumber)
{ {
_sequenceNumber = Context.SequenceNumber; SequenceNumber = Context.SequenceNumber;
SynchronizeMemory(); SynchronizeMemory();
} }

View file

@ -1,3 +1,4 @@
using Ryujinx.Common.Logging;
using Ryujinx.Cpu.Tracking; using Ryujinx.Cpu.Tracking;
using Ryujinx.Graphics.GAL; using Ryujinx.Graphics.GAL;
using Ryujinx.Memory.Range; using Ryujinx.Memory.Range;
@ -104,6 +105,8 @@ namespace Ryujinx.Graphics.Gpu.Memory
if (_useGranular) if (_useGranular)
{ {
_memoryTrackingGranular = physicalMemory.BeginGranularTracking(address, size, baseHandles); _memoryTrackingGranular = physicalMemory.BeginGranularTracking(address, size, baseHandles);
_memoryTrackingGranular.RegisterPreciseAction(address, size, PreciseAction);
} }
else else
{ {
@ -123,6 +126,8 @@ namespace Ryujinx.Graphics.Gpu.Memory
handle.Dispose(); handle.Dispose();
} }
} }
_memoryTracking.RegisterPreciseAction(PreciseAction);
} }
_externalFlushDelegate = new RegionSignal(ExternalFlush); _externalFlushDelegate = new RegionSignal(ExternalFlush);
@ -452,6 +457,38 @@ namespace Ryujinx.Graphics.Gpu.Memory
}, true); }, true);
} }
/// <summary>
/// An action to be performed when a precise memory access occurs to this resource.
/// For buffers, this skips flush-on-write by punching holes directly into the modified range list.
/// </summary>
/// <param name="address">Address of the memory action</param>
/// <param name="size">Size in bytes</param>
/// <param name="write">True if the access was a write, false otherwise</param>
private bool PreciseAction(ulong address, ulong size, bool write)
{
if (!write)
{
// We only want to skip flush-on-write.
return false;
}
if (address < Address)
{
address = Address;
}
ulong maxSize = Address + Size - address;
if (size > maxSize)
{
size = maxSize;
}
ForceDirty(address, size);
return true;
}
/// <summary> /// <summary>
/// Called when part of the memory for this buffer has been unmapped. /// Called when part of the memory for this buffer has been unmapped.
/// Calls are from non-GPU threads. /// Calls are from non-GPU threads.

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@ -4,6 +4,9 @@ using System;
namespace Ryujinx.Graphics.Gpu.Memory namespace Ryujinx.Graphics.Gpu.Memory
{ {
/// <summary>
/// A tracking handle for a region of GPU VA, represented by one or more tracking handles in CPU VA.
/// </summary>
class GpuRegionHandle : IRegionHandle class GpuRegionHandle : IRegionHandle
{ {
private readonly CpuRegionHandle[] _cpuRegionHandles; private readonly CpuRegionHandle[] _cpuRegionHandles;
@ -28,11 +31,18 @@ namespace Ryujinx.Graphics.Gpu.Memory
public ulong Size => throw new NotSupportedException(); public ulong Size => throw new NotSupportedException();
public ulong EndAddress => throw new NotSupportedException(); public ulong EndAddress => throw new NotSupportedException();
/// <summary>
/// Create a new GpuRegionHandle, made up of mulitple CpuRegionHandles.
/// </summary>
/// <param name="cpuRegionHandles">The CpuRegionHandles that make up this handle</param>
public GpuRegionHandle(CpuRegionHandle[] cpuRegionHandles) public GpuRegionHandle(CpuRegionHandle[] cpuRegionHandles)
{ {
_cpuRegionHandles = cpuRegionHandles; _cpuRegionHandles = cpuRegionHandles;
} }
/// <summary>
/// Dispose the child handles.
/// </summary>
public void Dispose() public void Dispose()
{ {
foreach (var regionHandle in _cpuRegionHandles) foreach (var regionHandle in _cpuRegionHandles)
@ -41,6 +51,11 @@ namespace Ryujinx.Graphics.Gpu.Memory
} }
} }
/// <summary>
/// Register an action to perform when the tracked region is read or written.
/// The action is automatically removed after it runs.
/// </summary>
/// <param name="action">Action to call on read or write</param>
public void RegisterAction(RegionSignal action) public void RegisterAction(RegionSignal action)
{ {
foreach (var regionHandle in _cpuRegionHandles) foreach (var regionHandle in _cpuRegionHandles)
@ -49,6 +64,22 @@ namespace Ryujinx.Graphics.Gpu.Memory
} }
} }
/// <summary>
/// Register an action to perform when a precise access occurs (one with exact address and size).
/// If the action returns true, read/write tracking are skipped.
/// </summary>
/// <param name="action">Action to call on read or write</param>
public void RegisterPreciseAction(PreciseRegionSignal action)
{
foreach (var regionHandle in _cpuRegionHandles)
{
regionHandle.RegisterPreciseAction(action);
}
}
/// <summary>
/// Consume the dirty flag for the handles, and reprotect so it can be set on the next write.
/// </summary>
public void Reprotect(bool asDirty = false) public void Reprotect(bool asDirty = false)
{ {
foreach (var regionHandle in _cpuRegionHandles) foreach (var regionHandle in _cpuRegionHandles)
@ -57,6 +88,9 @@ namespace Ryujinx.Graphics.Gpu.Memory
} }
} }
/// <summary>
/// Force the handles to be dirty, without reprotecting.
/// </summary>
public void ForceDirty() public void ForceDirty()
{ {
foreach (var regionHandle in _cpuRegionHandles) foreach (var regionHandle in _cpuRegionHandles)

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@ -194,6 +194,16 @@ namespace Ryujinx.Graphics.Gpu.Memory
WriteImpl(va, data, Physical.Write); WriteImpl(va, data, Physical.Write);
} }
/// <summary>
/// Writes data to GPU mapped memory, destined for a tracked resource.
/// </summary>
/// <param name="va">GPU virtual address to write the data into</param>
/// <param name="data">The data to be written</param>
public void WriteTrackedResource(ulong va, ReadOnlySpan<byte> data)
{
WriteImpl(va, data, Physical.WriteTrackedResource);
}
/// <summary> /// <summary>
/// Writes data to GPU mapped memory without write tracking. /// Writes data to GPU mapped memory without write tracking.
/// </summary> /// </summary>

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@ -80,28 +80,6 @@ namespace Ryujinx.Graphics.Gpu.Memory
} }
} }
/// <summary>
/// Write data to memory that is destined for a resource in a cache.
/// This avoids triggering write tracking when possible, which can avoid flushes and incrementing sequence number.
/// </summary>
/// <param name="memoryManager">The GPU memory manager</param>
/// <param name="gpuVa">GPU virtual address to write the data into</param>
/// <param name="data">The data to be written</param>
public void CacheResourceWrite(MemoryManager memoryManager, ulong gpuVa, ReadOnlySpan<byte> data)
{
if (TextureCache.IsTextureInRange(memoryManager, gpuVa, (ulong)data.Length))
{
// No fast path yet - copy the data back and trigger write tracking.
memoryManager.Write(gpuVa, data);
_context.AdvanceSequence();
}
else
{
BufferCache.ForceDirty(memoryManager, gpuVa, (ulong)data.Length);
memoryManager.WriteUntracked(gpuVa, data);
}
}
/// <summary> /// <summary>
/// Gets a span of data from the application process. /// Gets a span of data from the application process.
/// </summary> /// </summary>
@ -179,6 +157,17 @@ namespace Ryujinx.Graphics.Gpu.Memory
return _cpuMemory.ReadTracked<T>(address); return _cpuMemory.ReadTracked<T>(address);
} }
/// <summary>
/// Writes data to the application process, triggering a precise memory tracking event.
/// </summary>
/// <param name="address">Address to write into</param>
/// <param name="data">Data to be written</param>
public void WriteTrackedResource(ulong address, ReadOnlySpan<byte> data)
{
_cpuMemory.SignalMemoryTracking(address, (ulong)data.Length, true, precise: true);
_cpuMemory.WriteUntracked(address, data);
}
/// <summary> /// <summary>
/// Writes data to the application process. /// Writes data to the application process.
/// </summary> /// </summary>

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@ -79,7 +79,7 @@ namespace Ryujinx.Memory.Tests
throw new NotImplementedException(); throw new NotImplementedException();
} }
public void SignalMemoryTracking(ulong va, ulong size, bool write) public void SignalMemoryTracking(ulong va, ulong size, bool write, bool precise = false)
{ {
throw new NotImplementedException(); throw new NotImplementedException();
} }

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@ -399,5 +399,41 @@ namespace Ryujinx.Memory.Tests
Assert.AreEqual(singlePages[1], combinedHandles.ElementAt(9)); Assert.AreEqual(singlePages[1], combinedHandles.ElementAt(9));
Assert.AreEqual(singlePages[2], combinedHandles.ElementAt(10)); Assert.AreEqual(singlePages[2], combinedHandles.ElementAt(10));
} }
[Test]
public void PreciseAction()
{
bool actionTriggered = false;
MultiRegionHandle granular = _tracking.BeginGranularTracking(PageSize * 3, PageSize * 3, null, PageSize);
PreparePages(granular, 3, PageSize * 3);
// Add a precise action to the second and third handle in the multiregion.
granular.RegisterPreciseAction(PageSize * 4, PageSize * 2, (_, _, _) => { actionTriggered = true; return true; });
// Precise write to first handle in the multiregion.
_tracking.VirtualMemoryEvent(PageSize * 3, PageSize, true, precise: true);
Assert.IsFalse(actionTriggered); // Action not triggered.
bool firstPageModified = false;
granular.QueryModified(PageSize * 3, PageSize, (_, _) => { firstPageModified = true; });
Assert.IsTrue(firstPageModified); // First page is modified.
// Precise write to all handles in the multiregion.
_tracking.VirtualMemoryEvent(PageSize * 3, PageSize * 3, true, precise: true);
bool[] pagesModified = new bool[3];
for (int i = 3; i < 6; i++)
{
int index = i - 3;
granular.QueryModified(PageSize * (ulong)i, PageSize, (_, _) => { pagesModified[index] = true; });
}
Assert.IsTrue(actionTriggered); // Action triggered.
// Precise writes are ignored on two later handles due to the action returning true.
Assert.AreEqual(pagesModified, new bool[] { true, false, false });
}
} }
} }

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@ -449,5 +449,61 @@ namespace Ryujinx.Memory.Tests
handle.Dispose(); handle.Dispose();
} }
[Test]
public void PreciseAction()
{
RegionHandle handle = _tracking.BeginTracking(0, PageSize);
(ulong address, ulong size, bool write)? preciseTriggered = null;
handle.RegisterPreciseAction((address, size, write) =>
{
preciseTriggered = (address, size, write);
return true;
});
(ulong address, ulong size)? readTrackingTriggered = null;
handle.RegisterAction((address, size) =>
{
readTrackingTriggered = (address, size);
});
handle.Reprotect();
_tracking.VirtualMemoryEvent(0, 4, false, precise: true);
Assert.IsNull(readTrackingTriggered); // Hasn't been triggered - precise action returned true.
Assert.AreEqual(preciseTriggered, (0UL, 4UL, false)); // Precise action was triggered.
_tracking.VirtualMemoryEvent(0, 4, true, precise: true);
Assert.IsNull(readTrackingTriggered); // Still hasn't been triggered.
bool dirtyAfterPreciseActionTrue = handle.Dirty;
Assert.False(dirtyAfterPreciseActionTrue); // Not dirtied - precise action returned true.
Assert.AreEqual(preciseTriggered, (0UL, 4UL, true)); // Precise action was triggered.
// Handle is now dirty.
handle.Reprotect(true);
preciseTriggered = null;
_tracking.VirtualMemoryEvent(4, 4, true, precise: true);
Assert.AreEqual(preciseTriggered, (4UL, 4UL, true)); // Precise action was triggered even though handle was dirty.
handle.Reprotect();
handle.RegisterPreciseAction((address, size, write) =>
{
preciseTriggered = (address, size, write);
return false; // Now, we return false, which indicates that the regular read/write behaviours should trigger.
});
_tracking.VirtualMemoryEvent(8, 4, true, precise: true);
Assert.AreEqual(readTrackingTriggered, (8UL, 4UL)); // Read action triggered, as precise action returned false.
bool dirtyAfterPreciseActionFalse = handle.Dirty;
Assert.True(dirtyAfterPreciseActionFalse); // Dirtied, as precise action returned false.
Assert.AreEqual(preciseTriggered, (8UL, 4UL, true)); // Precise action was triggered.
}
} }
} }

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@ -481,7 +481,7 @@ namespace Ryujinx.Memory
throw new NotImplementedException(); throw new NotImplementedException();
} }
public void SignalMemoryTracking(ulong va, ulong size, bool write) public void SignalMemoryTracking(ulong va, ulong size, bool write, bool precise = false)
{ {
// Only the ARM Memory Manager has tracking for now. // Only the ARM Memory Manager has tracking for now.
} }

View file

@ -135,7 +135,8 @@ namespace Ryujinx.Memory
/// <param name="va">Virtual address of the region</param> /// <param name="va">Virtual address of the region</param>
/// <param name="size">Size of the region</param> /// <param name="size">Size of the region</param>
/// <param name="write">True if the region was written, false if read</param> /// <param name="write">True if the region was written, false if read</param>
void SignalMemoryTracking(ulong va, ulong size, bool write); /// <param name="precise">True if the access is precise, false otherwise</param>
void SignalMemoryTracking(ulong va, ulong size, bool write, bool precise = false);
/// <summary> /// <summary>
/// Reprotect a region of virtual memory for tracking. /// Reprotect a region of virtual memory for tracking.

View file

@ -52,6 +52,14 @@ namespace Ryujinx.Memory.Tracking
/// <param name="write">Whether the region was written to or read</param> /// <param name="write">Whether the region was written to or read</param>
public abstract void Signal(ulong address, ulong size, bool write); public abstract void Signal(ulong address, ulong size, bool write);
/// <summary>
/// Signals to the handles that a precise memory event has occurred. Assumes that the tracking lock has been obtained.
/// </summary>
/// <param name="address">Address accessed</param>
/// <param name="size">Size of the region affected in bytes</param>
/// <param name="write">Whether the region was written to or read</param>
public abstract void SignalPrecise(ulong address, ulong size, bool write);
/// <summary> /// <summary>
/// Split this region into two, around the specified address. /// Split this region into two, around the specified address.
/// This region is updated to end at the split address, and a new region is created to represent past that point. /// This region is updated to end at the split address, and a new region is created to represent past that point.

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@ -13,5 +13,6 @@ namespace Ryujinx.Memory.Tracking
void ForceDirty(); void ForceDirty();
void Reprotect(bool asDirty = false); void Reprotect(bool asDirty = false);
void RegisterAction(RegionSignal action); void RegisterAction(RegionSignal action);
void RegisterPreciseAction(PreciseRegionSignal action);
} }
} }

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@ -190,12 +190,15 @@ namespace Ryujinx.Memory.Tracking
/// <summary> /// <summary>
/// Signal that a virtual memory event happened at the given location. /// Signal that a virtual memory event happened at the given location.
/// This can be flagged as a precise event, which will avoid reprotection and call special handlers if possible.
/// A precise event has an exact address and size, rather than triggering on page granularity.
/// </summary> /// </summary>
/// <param name="address">Virtual address accessed</param> /// <param name="address">Virtual address accessed</param>
/// <param name="size">Size of the region affected in bytes</param> /// <param name="size">Size of the region affected in bytes</param>
/// <param name="write">Whether the region was written to or read</param> /// <param name="write">Whether the region was written to or read</param>
/// <param name="precise">True if the access is precise, false otherwise</param>
/// <returns>True if the event triggered any tracking regions, false otherwise</returns> /// <returns>True if the event triggered any tracking regions, false otherwise</returns>
public bool VirtualMemoryEvent(ulong address, ulong size, bool write) public bool VirtualMemoryEvent(ulong address, ulong size, bool write, bool precise = false)
{ {
// Look up the virtual region using the region list. // Look up the virtual region using the region list.
// Signal up the chain to relevant handles. // Signal up the chain to relevant handles.
@ -206,7 +209,7 @@ namespace Ryujinx.Memory.Tracking
int count = _virtualRegions.FindOverlapsNonOverlapping(address, size, ref overlaps); int count = _virtualRegions.FindOverlapsNonOverlapping(address, size, ref overlaps);
if (count == 0) if (count == 0 && !precise)
{ {
if (!_memoryManager.IsMapped(address)) if (!_memoryManager.IsMapped(address))
{ {
@ -224,9 +227,17 @@ namespace Ryujinx.Memory.Tracking
for (int i = 0; i < count; i++) for (int i = 0; i < count; i++)
{ {
VirtualRegion region = overlaps[i]; VirtualRegion region = overlaps[i];
if (precise)
{
region.SignalPrecise(address, size, write);
}
else
{
region.Signal(address, size, write); region.Signal(address, size, write);
} }
} }
}
return true; return true;
} }

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@ -206,6 +206,17 @@ namespace Ryujinx.Memory.Tracking
} }
} }
public void RegisterPreciseAction(ulong address, ulong size, PreciseRegionSignal action)
{
int startHandle = (int)((address - Address) / Granularity);
int lastHandle = (int)((address + (size - 1) - Address) / Granularity);
for (int i = startHandle; i <= lastHandle; i++)
{
_handles[i].RegisterPreciseAction(action);
}
}
public void Dispose() public void Dispose()
{ {
foreach (var handle in _handles) foreach (var handle in _handles)

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@ -0,0 +1,4 @@
namespace Ryujinx.Memory.Tracking
{
public delegate bool PreciseRegionSignal(ulong address, ulong size, bool write);
}

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@ -37,6 +37,7 @@ namespace Ryujinx.Memory.Tracking
private object _preActionLock = new object(); private object _preActionLock = new object();
private RegionSignal _preAction; // Action to perform before a read or write. This will block the memory access. private RegionSignal _preAction; // Action to perform before a read or write. This will block the memory access.
private PreciseRegionSignal _preciseAction; // Action to perform on a precise read or write.
private readonly List<VirtualRegion> _regions; private readonly List<VirtualRegion> _regions;
private readonly MemoryTracking _tracking; private readonly MemoryTracking _tracking;
private bool _disposed; private bool _disposed;
@ -113,7 +114,10 @@ namespace Ryujinx.Memory.Tracking
/// <summary> /// <summary>
/// Signal that a memory action occurred within this handle's virtual regions. /// Signal that a memory action occurred within this handle's virtual regions.
/// </summary> /// </summary>
/// <param name="address">Address accessed</param>
/// <param name="size">Size of the region affected in bytes</param>
/// <param name="write">Whether the region was written to or read</param> /// <param name="write">Whether the region was written to or read</param>
/// <param name="handleIterable">Reference to the handles being iterated, in case the list needs to be copied</param>
internal void Signal(ulong address, ulong size, bool write, ref IList<RegionHandle> handleIterable) internal void Signal(ulong address, ulong size, bool write, ref IList<RegionHandle> handleIterable)
{ {
// If this handle was already unmapped (even if just partially), // If this handle was already unmapped (even if just partially),
@ -163,6 +167,27 @@ namespace Ryujinx.Memory.Tracking
} }
} }
/// <summary>
/// Signal that a precise memory action occurred within this handle's virtual regions.
/// If there is no precise action, or the action returns false, the normal signal handler will be called.
/// </summary>
/// <param name="address">Address accessed</param>
/// <param name="size">Size of the region affected in bytes</param>
/// <param name="write">Whether the region was written to or read</param>
/// <param name="handleIterable">Reference to the handles being iterated, in case the list needs to be copied</param>
/// <returns>True if a precise action was performed and returned true, false otherwise</returns>
internal bool SignalPrecise(ulong address, ulong size, bool write, ref IList<RegionHandle> handleIterable)
{
if (!Unmapped && _preciseAction != null && _preciseAction(address, size, write))
{
return true;
}
Signal(address, size, write, ref handleIterable);
return false;
}
/// <summary> /// <summary>
/// Force this handle to be dirty, without reprotecting. /// Force this handle to be dirty, without reprotecting.
/// </summary> /// </summary>
@ -243,6 +268,16 @@ namespace Ryujinx.Memory.Tracking
} }
} }
/// <summary>
/// Register an action to perform when a precise access occurs (one with exact address and size).
/// If the action returns true, read/write tracking are skipped.
/// </summary>
/// <param name="action">Action to call on read or write</param>
public void RegisterPreciseAction(PreciseRegionSignal action)
{
_preciseAction = action;
}
/// <summary> /// <summary>
/// Register an action to perform when the region is written to. /// Register an action to perform when the region is written to.
/// This action will not be removed when it is called - it is called each time the dirty flag is set. /// This action will not be removed when it is called - it is called each time the dirty flag is set.

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@ -63,6 +63,17 @@ namespace Ryujinx.Memory.Tracking
} }
} }
public void RegisterPreciseAction(PreciseRegionSignal action)
{
foreach (var handle in _handles)
{
if (handle != null)
{
handle?.RegisterPreciseAction((address, size, write) => action(handle.Address, handle.Size, write));
}
}
}
public void QueryModified(Action<ulong, ulong> modifiedAction) public void QueryModified(Action<ulong, ulong> modifiedAction)
{ {
if (!Dirty) if (!Dirty)

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@ -31,6 +31,25 @@ namespace Ryujinx.Memory.Tracking
UpdateProtection(); UpdateProtection();
} }
public override void SignalPrecise(ulong address, ulong size, bool write)
{
IList<RegionHandle> handles = Handles;
bool allPrecise = true;
for (int i = 0; i < handles.Count; i++)
{
allPrecise &= handles[i].SignalPrecise(address, size, write, ref handles);
}
// Only update protection if a regular signal handler was called.
// This allows precise actions to skip reprotection costs if they want (they can still do it manually).
if (!allPrecise)
{
UpdateProtection();
}
}
/// <summary> /// <summary>
/// Signal that this region has been mapped or unmapped. /// Signal that this region has been mapped or unmapped.
/// </summary> /// </summary>