ryujinx/Ryujinx
1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-12-23 18:25:31 +00:00
Code Issues Packages Projects Releases Wiki Activity

Add PSET shader instruction

Browse source
This commit is contained in:
gdk 2019-11-24 19:49:56 -03:00 committed by Thog
parent 73e68edd09
commit e0c95b18eb
3 changed files with 41 additions and 11 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
Ryujinx.Graphics.Shader/Decoders/OpCodePsetp.cs → Ryujinx.Graphics.Shader/Decoders/OpCodePset.cs
View file

@ -2,18 +2,24 @@ using Ryujinx.Graphics.Shader.Instructions;
namespace Ryujinx.Graphics.Shader.Decoders
{
class OpCodePsetp : OpCodeSet
class OpCodePset : OpCodeSet
{
public Register Predicate12 { get; }
public Register Predicate29 { get; }
public bool InvertA { get; }
public bool InvertB { get; }
public LogicalOperation LogicalOpAB { get; }
public OpCodePsetp(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
public OpCodePset(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
{
Predicate12 = new Register(opCode.Extract(12, 3), RegisterType.Predicate);
Predicate29 = new Register(opCode.Extract(29, 3), RegisterType.Predicate);
InvertA = opCode.Extract(15);
InvertB = opCode.Extract(32);
LogicalOpAB = (LogicalOperation)opCode.Extract(24, 2);
}
}

5
Ryujinx.Graphics.Shader/Decoders/OpCodeTable.cs
View file

@ -43,7 +43,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
Set("111000100100xx", InstEmit.Bra, typeof(OpCodeBranch));
Set("111000110100xx", InstEmit.Brk, typeof(OpCodeBranchPop));
Set("111000100101xx", InstEmit.Brx, typeof(OpCodeBranchIndir));
Set("0101000010100x", InstEmit.Csetp, typeof(OpCodePsetp));
Set("0101000010100x", InstEmit.Csetp, typeof(OpCodePset));
Set("111000110000xx", InstEmit.Exit, typeof(OpCodeExit));
Set("0100110010101x", InstEmit.F2F, typeof(OpCodeFArithCbuf));
Set("0011100x10101x", InstEmit.F2F, typeof(OpCodeFArithImm));
@ -142,7 +142,8 @@ namespace Ryujinx.Graphics.Shader.Decoders
Set("0100110000001x", InstEmit.Popc, typeof(OpCodeAluCbuf));
Set("0011100x00001x", InstEmit.Popc, typeof(OpCodeAluImm));
Set("0101110000001x", InstEmit.Popc, typeof(OpCodeAluReg));
Set("0101000010010x", InstEmit.Psetp, typeof(OpCodePsetp));
Set("0101000010001x", InstEmit.Pset, typeof(OpCodePset));
Set("0101000010010x", InstEmit.Psetp, typeof(OpCodePset));
Set("0100110011110x", InstEmit.R2p, typeof(OpCodeAluCbuf));
Set("0011100x11110x", InstEmit.R2p, typeof(OpCodeAluImm));
Set("0101110011110x", InstEmit.R2p, typeof(OpCodeAluReg));

37
Ryujinx.Graphics.Shader/Instructions/InstEmitAlu.cs
View file

@ -58,7 +58,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
public static void Csetp(EmitterContext context)
{
OpCodePsetp op = (OpCodePsetp)context.CurrOp;
OpCodePset op = (OpCodePset)context.CurrOp;
// TODO: Implement that properly
@ -381,15 +381,38 @@ namespace Ryujinx.Graphics.Shader.Instructions
context.Copy(GetDest(context), res);
}
public static void Pset(EmitterContext context)
{
OpCodePset op = (OpCodePset)context.CurrOp;
bool boolFloat = op.RawOpCode.Extract(44);
Operand srcA = context.BitwiseNot(Register(op.Predicate12), op.InvertA);
Operand srcB = context.BitwiseNot(Register(op.Predicate29), op.InvertB);
Operand srcC = context.BitwiseNot(Register(op.Predicate39), op.InvertP);
Operand res = GetPredLogicalOp(context, op.LogicalOpAB, srcA, srcB);
res = GetPredLogicalOp(context, op.LogicalOp, res, srcC);
Operand dest = GetDest(context);
if (boolFloat)
{
context.Copy(dest, context.ConditionalSelect(res, ConstF(1), Const(0)));
}
else
{
context.Copy(dest, res);
}
}
public static void Psetp(EmitterContext context)
{
OpCodePsetp op = (OpCodePsetp)context.CurrOp;
OpCodePset op = (OpCodePset)context.CurrOp;
bool invertA = op.RawOpCode.Extract(15);
bool invertB = op.RawOpCode.Extract(32);
Operand srcA = context.BitwiseNot(Register(op.Predicate12), invertA);
Operand srcB = context.BitwiseNot(Register(op.Predicate29), invertB);
Operand srcA = context.BitwiseNot(Register(op.Predicate12), op.InvertA);
Operand srcB = context.BitwiseNot(Register(op.Predicate29), op.InvertB);
Operand p0Res = GetPredLogicalOp(context, op.LogicalOpAB, srcA, srcB);