Ryujinx/Ryujinx.Tests/Cpu
gdkchan 2bb9b33da1
Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544)
* Implement Arm32 Sha256 and MRS Rd, CPSR instructions

* Add tests using Arm64 outputs
2022-08-05 19:03:50 +02:00
..
CpuContext.cs Refactor CPU interface to allow the implementation of other CPU emulators (#3362) 2022-05-31 16:29:35 -03:00
CpuTest.cs Refactor CPU interface to allow the implementation of other CPU emulators (#3362) 2022-05-31 16:29:35 -03:00
CpuTest32.cs Refactor CPU interface to allow the implementation of other CPU emulators (#3362) 2022-05-31 16:29:35 -03:00
CpuTestAlu.cs
CpuTestAlu32.cs
CpuTestAluBinary.cs
CpuTestAluBinary32.cs
CpuTestAluImm.cs
CpuTestAluImm32.cs
CpuTestAluRs.cs
CpuTestAluRs32.cs
CpuTestAluRx.cs
CpuTestBf32.cs
CpuTestBfm.cs
CpuTestCcmpImm.cs
CpuTestCcmpReg.cs
CpuTestCsel.cs
CpuTestMisc.cs
CpuTestMisc32.cs
CpuTestMov.cs
CpuTestMul.cs
CpuTestMul32.cs
CpuTestSimd.cs Implement CPU FCVT Half <-> Double conversion variants (#3439) 2022-07-06 13:40:31 +02:00
CpuTestSimd32.cs Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544) 2022-08-05 19:03:50 +02:00
CpuTestSimdCrypto.cs
CpuTestSimdCrypto32.cs
CpuTestSimdCvt.cs
CpuTestSimdCvt32.cs
CpuTestSimdExt.cs
CpuTestSimdFcond.cs
CpuTestSimdFmov.cs
CpuTestSimdImm.cs
CpuTestSimdIns.cs
CpuTestSimdLogical32.cs
CpuTestSimdMemory32.cs
CpuTestSimdMov32.cs
CpuTestSimdReg.cs
CpuTestSimdReg32.cs Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544) 2022-08-05 19:03:50 +02:00
CpuTestSimdRegElem.cs
CpuTestSimdRegElem32.cs
CpuTestSimdRegElemF.cs
CpuTestSimdShImm.cs
CpuTestSimdShImm32.cs
CpuTestSimdTbl.cs
CpuTestSystem.cs
CpuTestT32Alu.cs
CpuTestT32Flow.cs
CpuTestT32Mem.cs
CpuTestThumb.cs
PrecomputedMemoryThumbTestCase.cs
PrecomputedThumbTestCase.cs