..
CodeGen
Implement Force Early Z Register ( #1755 )
2020-12-02 00:13:27 +01:00
Decoders
Fix remap when handle is 0 ( #1882 )
2021-01-10 10:11:31 +11:00
Instructions
Implement shader CC mode for ISCADD, X mode for ISETP and fix STL/STS/STG with RZ ( #1901 )
2021-01-13 08:52:13 +11:00
IntermediateRepresentation
Simplify logic for bindless texture handling ( #1667 )
2020-11-09 19:35:04 -03:00
StructuredIr
Simplify logic for bindless texture handling ( #1667 )
2020-11-09 19:35:04 -03:00
Translation
Implement shader CC mode for ISCADD, X mode for ISETP and fix STL/STS/STG with RZ ( #1901 )
2021-01-13 08:52:13 +11:00
BufferDescriptor.cs
Salieri: shader cache ( #1701 )
2020-11-13 00:15:34 +01:00
IGpuAccessor.cs
Implement Force Early Z Register ( #1755 )
2020-12-02 00:13:27 +01:00
InputTopology.cs
Salieri: shader cache ( #1701 )
2020-11-13 00:15:34 +01:00
OutputTopology.cs
Support texture rectangle targets (non-normalized coords)
2020-01-09 02:13:00 +01:00
Ryujinx.Graphics.Shader.csproj
infra: Migrate to .NET 5 ( #1694 )
2020-11-15 19:27:15 +01:00
SamplerType.cs
Avoid sampler conflicts on bindless samplers with the same name ( #1642 )
2020-10-28 21:20:43 +01:00
ShaderProgram.cs
Salieri: shader cache ( #1701 )
2020-11-13 00:15:34 +01:00
ShaderProgramInfo.cs
Salieri: shader cache ( #1701 )
2020-11-13 00:15:34 +01:00
ShaderStage.cs
Salieri: shader cache ( #1701 )
2020-11-13 00:15:34 +01:00
TextureDescriptor.cs
Salieri: shader cache ( #1701 )
2020-11-13 00:15:34 +01:00
TextureFormat.cs
Implement SULD shader instruction ( #1117 )
2020-04-22 09:35:28 +10:00
TextureUsageFlags.cs
Support res scale on images, correctly blacklist for SUST, move logic out of backend. ( #1657 )
2020-11-02 16:53:23 -03:00