Ryujinx/ARMeilleure
Valentin PONS 3af2ce74ec
Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192)
* Added some 32 bits instructions:

* VBIC
* VTST
* VSRA

* Incremented the PTC

* Add tests and fix implementation

* Fixed VBIC immediate opcode mapping

* Hey hey!

* Nit.

Co-authored-by: gdkchan <gab.dark.100@gmail.com>
Co-authored-by: LDj3SNuD <dvitiello@gmail.com>
Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>
2020-07-19 15:11:58 -03:00
..
CodeGen Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
Common
Decoders Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192) 2020-07-19 15:11:58 -03:00
Diagnostics Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
Instructions Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192) 2020-07-19 15:11:58 -03:00
IntermediateRepresentation Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
Memory
State Implement CNTVCT_EL0 (#1268) 2020-05-23 12:15:59 +02:00
Translation Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192) 2020-07-19 15:11:58 -03:00
ARMeilleure.csproj Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
Optimizations.cs Faster crc32 implementation (#1294) 2020-06-05 20:58:27 +10:00
Statistics.cs