ryujinx/Ryujinx
1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-11-08 15:48:33 +00:00
Code Issues Packages Projects Releases Wiki Activity
Ryujinx/ARMeilleure/Translation
History
riperiperi 9ef94c8292
ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661) 
* ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext

Some games access these system registers several tens of thousands of times in a second from many different threads. While this isn't really crippling, it is a lot of wasted time spent in a reverse pinvoke transition.

Example games are Pokemon Scarlet/Violet and BOTW. These games have a lot of different potential bottlenecks so it's unlikely you will see a consistent improvement, but it definitely disappears from the cpu profile.

* Remove unreachable code.

* Add ulong conversion for offsets

* Nit
2023-04-11 08:55:04 +02:00
..
Cache Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
PTC ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661) 2023-04-11 08:55:04 +02:00
ArmEmitterContext.cs ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618) 2023-04-10 12:22:58 +02:00
Compiler.cs Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
CompilerContext.cs Make structs readonly when applicable (#4002) 2022-12-05 14:47:39 +01:00
CompilerOptions.cs Refactor PtcInfo (#2625) 2021-09-14 01:23:37 +02:00
ControlFlowGraph.cs Implement some 32-bit Thumb instructions (#3614) 2022-08-25 09:59:34 +00:00
DelegateHelper.cs Use new ArgumentNullException and ObjectDisposedException throw-helper API (#4163) 2022-12-27 20:27:11 +01:00
DelegateInfo.cs PPTC Follow-up. (#1712) 2020-12-17 20:32:09 +01:00
Delegates.cs ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661) 2023-04-11 08:55:04 +02:00
DispatcherFunction.cs ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618) 2023-04-10 12:22:58 +02:00
Dominance.cs Replace LinkedList by IntrusiveList to avoid allocations on JIT (#931) 2020-02-17 22:30:54 +01:00
EmitterContext.cs Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015) 2022-01-21 12:47:34 -03:00
GuestFunction.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IntervalTree.cs Use new ArgumentNullException and ObjectDisposedException throw-helper API (#4163) 2022-12-27 20:27:11 +01:00
RegisterToLocal.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
RegisterUsage.cs Make structs readonly when applicable (#4002) 2022-12-05 14:47:39 +01:00
RejitRequest.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
SsaConstruction.cs Some minor cleanups and optimizations (#4174) 2022-12-24 14:30:39 -03:00
SsaDeconstruction.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
TranslatedFunction.cs ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618) 2023-04-10 12:22:58 +02:00
Translator.cs ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618) 2023-04-10 12:22:58 +02:00
TranslatorCache.cs Enable CPU JIT cache invalidation (#2965) 2022-02-18 02:53:18 +01:00
TranslatorQueue.cs Clean up rejit queue (#2751) 2022-09-08 20:14:08 -03:00
TranslatorStubs.cs ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618) 2023-04-10 12:22:58 +02:00
TranslatorTestMethods.cs ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618) 2023-04-10 12:22:58 +02:00