Ryujinx/ChocolArm64/Instruction
2018-08-14 23:54:12 -03:00
..
AInst.cs
AInstEmitAlu.cs Remove broken adds/cmn with condition check optimization (#218) 2018-07-03 21:54:05 -03:00
AInstEmitAluHelper.cs
AInstEmitBfm.cs
AInstEmitCcmp.cs
AInstEmitCsel.cs
AInstEmitException.cs
AInstEmitFlow.cs
AInstEmitHash.cs
AInstEmitMemory.cs
AInstEmitMemoryEx.cs Fix load/store exclusive/atomic pairwise instructions (#337) 2018-08-10 01:14:27 -03:00
AInstEmitMemoryHelper.cs
AInstEmitMove.cs
AInstEmitMul.cs
AInstEmitSimdArithmetic.cs Zero out bits 63:32 of scalar float operations with SSE intrinsics (#273) 2018-08-14 23:54:12 -03:00
AInstEmitSimdCmp.cs Zero out bits 63:32 of scalar float operations with SSE intrinsics (#273) 2018-08-14 23:54:12 -03:00
AInstEmitSimdCvt.cs Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225) 2018-07-14 13:13:02 -03:00
AInstEmitSimdHelper.cs Zero out bits 63:32 of scalar float operations with SSE intrinsics (#273) 2018-08-14 23:54:12 -03:00
AInstEmitSimdLogical.cs Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225) 2018-07-14 13:13:02 -03:00
AInstEmitSimdMemory.cs Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225) 2018-07-14 13:13:02 -03:00
AInstEmitSimdMove.cs Implement Ssubw_V and Usubw_V instructions. (#287) 2018-07-18 21:06:28 -03:00
AInstEmitSimdShift.cs Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225) 2018-07-14 13:13:02 -03:00
AInstEmitSystem.cs
AInstEmitter.cs
AInstInterpreter.cs
ASoftFallback.cs Add Sqdmulh_S, Sqdmulh_V, Sqrdmulh_S, Sqrdmulh_V instructions; add 6 Tests. Now all saturating methods are on ASoftFallback. (#334) 2018-08-10 14:27:15 -03:00
ASoftFloat.cs Fix silly copy/paste error on float variant of the FMINNM instruction 2018-08-05 18:56:30 -03:00
AVectorHelper.cs Zero out bits 63:32 of scalar float operations with SSE intrinsics (#273) 2018-08-14 23:54:12 -03:00