Ryujinx/ChocolArm64/Instruction
LDj3SNuD bba9bf97d0 Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437)
* Update CpuTest.cs

* Delete CpuTestSimdCmp.cs

Obsolete.

* Update CpuTestSimdArithmetic.cs

Superseded.

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdHelper.cs

* Update ASoftFloat.cs

* Nit.

* Update AOpCodeTable.cs

* Update AOptimizations.cs

* Update AInstEmitSimdArithmetic.cs

* Update ASoftFloat.cs

* Update CpuTest.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update ASoftFloat.cs

* Update CpuTestSimdReg.cs

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update ASoftFloat.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs
2018-10-05 22:45:59 -03:00
..
ACryptoHelper.cs Add AESD, AESE, AESIMC, AESMC instructions; add 4 simple Tests (closed box). (#365) 2018-08-20 01:20:26 -03:00
AInst.cs
AInstEmitAlu.cs
AInstEmitAluHelper.cs
AInstEmitBfm.cs
AInstEmitCcmp.cs
AInstEmitCsel.cs
AInstEmitException.cs
AInstEmitFlow.cs Remove cold methods from the CPU cache (#224) 2018-09-19 17:07:56 -03:00
AInstEmitHash.cs
AInstEmitMemory.cs
AInstEmitMemoryEx.cs Thread scheduler rewrite (#393) 2018-09-18 20:36:43 -03:00
AInstEmitMemoryHelper.cs
AInstEmitMove.cs
AInstEmitMul.cs
AInstEmitSimdArithmetic.cs Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437) 2018-10-05 22:45:59 -03:00
AInstEmitSimdCmp.cs Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405) 2018-09-26 23:30:21 -03:00
AInstEmitSimdCrypto.cs Add AESD, AESE, AESIMC, AESMC instructions; add 4 simple Tests (closed box). (#365) 2018-08-20 01:20:26 -03:00
AInstEmitSimdCvt.cs Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405) 2018-09-26 23:30:21 -03:00
AInstEmitSimdHash.cs
AInstEmitSimdHelper.cs Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437) 2018-10-05 22:45:59 -03:00
AInstEmitSimdLogical.cs Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405) 2018-09-26 23:30:21 -03:00
AInstEmitSimdMemory.cs
AInstEmitSimdMove.cs Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405) 2018-09-26 23:30:21 -03:00
AInstEmitSimdShift.cs Fix/Add 1+12 [Saturating] [Rounded] Shift Right Narrow (imm.) Instructions; add 14 Tests. Add 6 Tests for PR#405. Add 2 Tests for PR#412. (#409) 2018-09-17 01:54:05 -03:00
AInstEmitSystem.cs
AInstEmitter.cs
AInstInterpreter.cs
ASoftFallback.cs Fix/Add 10 Shift Right and Mls_Ve Instructions; add 14 Tests. (#407) 2018-09-08 14:24:29 -03:00
ASoftFloat.cs Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437) 2018-10-05 22:45:59 -03:00
AVectorHelper.cs Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405) 2018-09-26 23:30:21 -03:00