mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-11-09 22:38:33 +00:00
6b23a2c125
* Start implementing a new shader translator * Fix shift instructions and a typo * Small refactoring on StructuredProgram, move RemovePhis method to a separate class * Initial geometry shader support * Implement TLD4 * Fix -- There's no negation on FMUL32I * Add constant folding and algebraic simplification optimizations, nits * Some leftovers from constant folding * Avoid cast for constant assignments * Add a branch elimination pass, and misc small fixes * Remove redundant branches, add expression propagation and other improvements on the code * Small leftovers -- add missing break and continue, remove unused properties, other improvements * Add null check to handle empty block cases on block visitor * Add HADD2 and HMUL2 half float shader instructions * Optimize pack/unpack sequences, some fixes related to half float instructions * Add TXQ, TLD, TLDS and TLD4S shader texture instructions, and some support for bindless textures, some refactoring on codegen * Fix copy paste mistake that caused RZ to be ignored on the AST instruction * Add workaround for conditional exit, and fix half float instruction with constant buffer * Add missing 0.0 source for TLDS.LZ variants * Simplify the switch for TLDS.LZ * Texture instructions related fixes * Implement the HFMA instruction, and some misc. fixes * Enable constant folding on UnpackHalf2x16 instructions * Refactor HFMA to use OpCode* for opcode decoding rather than on the helper methods * Remove the old shader translator * Remove ShaderDeclInfo and other unused things * Add dual vertex shader support * Add ShaderConfig, used to pass shader type and maximum cbuffer size * Move and rename some instruction enums * Move texture instructions into a separate file * Move operand GetExpression and locals management to OperandManager * Optimize opcode decoding using a simple list and binary search * Add missing condition for do-while on goto elimination * Misc. fixes on texture instructions * Simplify TLDS switch * Address PR feedback, and a nit
107 lines
3.1 KiB
C#
107 lines
3.1 KiB
C#
using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.Translation;
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using System.Collections.Generic;
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using System.Linq;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Instructions
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{
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static partial class InstEmit
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{
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public static void Bra(EmitterContext context)
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{
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EmitBranch(context, context.CurrBlock.Branch.Address);
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}
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public static void Exit(EmitterContext context)
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{
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OpCodeExit op = (OpCodeExit)context.CurrOp;
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//TODO: Figure out how this is supposed to work in the
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//presence of other condition codes.
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if (op.Condition == Condition.Always)
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{
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context.Return();
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}
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}
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public static void Kil(EmitterContext context)
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{
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context.Discard();
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}
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public static void Ssy(EmitterContext context)
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{
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OpCodeSsy op = (OpCodeSsy)context.CurrOp;
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foreach (KeyValuePair<OpCodeSync, Operand> kv in op.Syncs)
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{
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OpCodeSync opSync = kv.Key;
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Operand local = kv.Value;
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int ssyIndex = opSync.Targets[op];
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context.Copy(local, Const(ssyIndex));
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}
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}
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public static void Sync(EmitterContext context)
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{
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OpCodeSync op = (OpCodeSync)context.CurrOp;
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if (op.Targets.Count == 1)
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{
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//If we have only one target, then the SSY is basically
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//a branch, we can produce better codegen for this case.
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OpCodeSsy opSsy = op.Targets.Keys.First();
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EmitBranch(context, opSsy.GetAbsoluteAddress());
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}
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else
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{
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foreach (KeyValuePair<OpCodeSsy, int> kv in op.Targets)
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{
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OpCodeSsy opSsy = kv.Key;
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Operand label = context.GetLabel(opSsy.GetAbsoluteAddress());
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Operand local = opSsy.Syncs[op];
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int ssyIndex = kv.Value;
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context.BranchIfTrue(label, context.ICompareEqual(local, Const(ssyIndex)));
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}
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}
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}
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private static void EmitBranch(EmitterContext context, ulong address)
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{
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//If we're branching to the next instruction, then the branch
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//is useless and we can ignore it.
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if (address == context.CurrOp.Address + 8)
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{
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return;
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}
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Operand label = context.GetLabel(address);
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Operand pred = Register(context.CurrOp.Predicate);
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if (context.CurrOp.Predicate.IsPT)
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{
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context.Branch(label);
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}
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else if (context.CurrOp.InvertPredicate)
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{
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context.BranchIfFalse(label, pred);
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}
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else
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{
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context.BranchIfTrue(label, pred);
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}
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}
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}
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} |