Ryujinx/ChocolArm64/Translation
gdkchan 932224f051 ARM exclusive monitor and multicore fixes (#589)
* Implement ARM exclusive load/store with compare exchange insts, and enable multicore by default

* Fix comment typo

* Support Linux and OSX on MemoryAlloc and CompareExchange128, some cleanup

* Use intel syntax on assembly code

* Adjust identation

* Add CPUID check and fix exclusive reservation granule size

* Update schema multicore scheduling default value

* Make the cpu id check code lower case aswell
2019-02-19 10:52:06 +11:00
..
IILEmit.cs
ILBarrier.cs
ILBlock.cs
ILEmitterCtx.cs ARM exclusive monitor and multicore fixes (#589) 2019-02-19 10:52:06 +11:00
ILGeneratorEx.cs
ILLabel.cs
ILMethodBuilder.cs Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
ILOpCode.cs
ILOpCodeBranch.cs
ILOpCodeCall.cs Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
ILOpCodeConst.cs
ILOpCodeLoad.cs
ILOpCodeLoadField.cs Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
ILOpCodeLoadState.cs
ILOpCodeLog.cs
ILOpCodeStore.cs
ILOpCodeStoreState.cs
IoType.cs
LocalAlloc.cs
TranslatedSub.cs Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
TranslationTier.cs Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
Translator.cs Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
TranslatorCache.cs Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
TranslatorQueue.cs Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
TranslatorQueueItem.cs Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00