gdkchan e21ebbf666 Misc. CPU optimizations (#575) ... * Add optimizations related to caller/callee saved registers, thread synchronization and disable tier 0 * Refactoring * Add a config entry to enable or disable the reg load/store opt. * Remove unnecessary register state stores for calls when the callee is know * Rename IoType to VarType * Enable tier 0 while fixing some perf issues related to tier 0 * Small tweak -- Compile before adding to the cache, to avoid lags * Add required config entry		2019-02-28 13:03:31 +11:00
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Decoders
Events	Optimize address translation and write tracking on the MMU (#571)	2019-02-24 18:24:35 +11:00
Instructions	Misc. CPU optimizations (#575)	2019-02-28 13:03:31 +11:00
Memory	Optimize address translation and write tracking on the MMU (#571)	2019-02-24 18:24:35 +11:00
State
Translation	Misc. CPU optimizations (#575)	2019-02-28 13:03:31 +11:00
ChocolArm64.csproj
CpuThread.cs
OpCodeTable.cs
Optimizations.cs	Misc. CPU optimizations (#575)	2019-02-28 13:03:31 +11:00