mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-11-08 19:38:54 +00:00
0c1ea1212a
* Add initial implementation of the Tamper Machine * Implement Atmosphere opcodes 0, 4 and 9 * Add missing TamperCompilationException class * Implement Atmosphere conditional and loop opcodes 1, 2 and 3 * Inplement input conditional opcode 8 * Add register store opcode A * Implement extended pause/resume opcodes FF0 and FF1 * Implement extended log opcode FFF * Implement extended register conditional opcode C0 * Refactor TamperProgram to an interface * Moved Atmosphere classes to a separate subdirectory * Fix OpProcCtrl class not setting process * Implement extended register save/restore opcodes C1, C2 and C3 * Refactor code emitters to separate classes * Supress memory access errors from the Tamper Machine * Add debug information to tamper register and memory writes * Add block stack check to Atmosphere Cheat compiler * Add handheld input support to Tamper Machine * Fix code styling * Fix build id and cheat case mismatch * Fix invalid immediate size selection * Print build ids of the title * Prevent Tamper Machine from change code regions * Remove Atmosphere namespace * Remove empty cheats from the list * Prevent code modification without disabling the tampering * Fix missing addressing mode in LoadRegisterWithMemory * Fix wrong addressing in RegisterConditional * Add name to the tamper machine thread * Fix code styling
100 lines
4.8 KiB
C#
100 lines
4.8 KiB
C#
using Ryujinx.HLE.Exceptions;
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using Ryujinx.HLE.HOS.Tamper.Operations;
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namespace Ryujinx.HLE.HOS.Tamper.CodeEmitters
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{
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/// <summary>
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/// Code type 10 allows writing a register to memory.
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/// </summary>
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class StoreRegisterToMemory
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{
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private const int OperationWidthIndex = 1;
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private const int SourceRegisterIndex = 2;
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private const int AddressRegisterIndex = 3;
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private const int IncrementAddressRegisterIndex = 4;
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private const int AddressingTypeIndex = 5;
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private const int RegisterOrMemoryRegionIndex = 6;
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private const int OffsetImmediateIndex = 7;
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private const int AddressRegister = 0;
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private const int AddressRegisterWithOffsetRegister = 1;
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private const int OffsetImmediate = 2;
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private const int MemoryRegionWithOffsetRegister = 3;
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private const int MemoryRegionWithOffsetImmediate = 4;
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private const int MemoryRegionWithOffsetRegisterAndImmediate = 5;
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private const int OffsetImmediateSize1 = 1;
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private const int OffsetImmediateSize9 = 9;
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public static void Emit(byte[] instruction, CompilationContext context)
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{
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// ATSRIOxa (aaaaaaaa)
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// T: Width of memory write (1, 2, 4, or 8 bytes).
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// S: Register to write to memory.
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// R: Register to use as base address.
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// I: Increment register flag (0 = do not increment R, 1 = increment R by T).
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// O: Offset type, see below.
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// x: Register used as offset when O is 1, Memory type when O is 3, 4 or 5.
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// a: Value used as offset when O is 2, 4 or 5.
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byte operationWidth = instruction[OperationWidthIndex];
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Register sourceRegister = context.GetRegister(instruction[SourceRegisterIndex]);
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Register addressRegister = context.GetRegister(instruction[AddressRegisterIndex]);
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byte incrementAddressRegister = instruction[IncrementAddressRegisterIndex];
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byte offsetType = instruction[AddressingTypeIndex];
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byte registerOrMemoryRegion = instruction[RegisterOrMemoryRegionIndex];
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int immediateSize = instruction.Length <= 8 ? OffsetImmediateSize1 : OffsetImmediateSize9;
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ulong immediate = InstructionHelper.GetImmediate(instruction, OffsetImmediateIndex, immediateSize);
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Pointer destinationMemory;
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switch (offsetType)
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{
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case AddressRegister:
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// *($R) = $S
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destinationMemory = MemoryHelper.EmitPointer(addressRegister, context);
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break;
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case AddressRegisterWithOffsetRegister:
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// *($R + $x) = $S
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Register offsetRegister = context.GetRegister(registerOrMemoryRegion);
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destinationMemory = MemoryHelper.EmitPointer(addressRegister, offsetRegister, context);
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break;
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case OffsetImmediate:
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// *(#a) = $S
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destinationMemory = MemoryHelper.EmitPointer(addressRegister, immediate, context);
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break;
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case MemoryRegionWithOffsetRegister:
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// *(?x + $R) = $S
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destinationMemory = MemoryHelper.EmitPointer((MemoryRegion)registerOrMemoryRegion, addressRegister, context);
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break;
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case MemoryRegionWithOffsetImmediate:
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// *(?x + #a) = $S
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destinationMemory = MemoryHelper.EmitPointer((MemoryRegion)registerOrMemoryRegion, immediate, context);
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break;
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case MemoryRegionWithOffsetRegisterAndImmediate:
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// *(?x + #a + $R) = $S
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destinationMemory = MemoryHelper.EmitPointer((MemoryRegion)registerOrMemoryRegion, addressRegister, immediate, context);
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break;
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default:
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throw new TamperCompilationException($"Invalid offset type {offsetType} in Atmosphere cheat");
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}
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InstructionHelper.EmitMov(operationWidth, context, destinationMemory, sourceRegister);
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switch (incrementAddressRegister)
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{
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case 0:
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// Don't increment the address register by operationWidth.
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break;
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case 1:
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// Increment the address register by operationWidth.
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IOperand increment = new Value<ulong>(operationWidth);
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context.CurrentOperations.Add(new OpAdd<ulong>(addressRegister, addressRegister, increment));
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break;
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default:
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throw new TamperCompilationException($"Invalid increment mode {incrementAddressRegister} in Atmosphere cheat");
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}
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}
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}
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}
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