Ryujinx/ARMeilleure/CodeGen/X86
gdkchan f0824fde9f
Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015)
* Add host CPU memory barriers for DMB/DSB and ordered load/store

* PPTC version bump

* Revert to old barrier order
2022-01-21 12:47:34 -03:00
..
Assembler.cs Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015) 2022-01-21 12:47:34 -03:00
AssemblerTable.cs
CallConvName.cs
CallingConvention.cs misc: Migrate usage of RuntimeInformation to OperatingSystem (#2901) 2021-12-04 20:02:30 -03:00
CodeGenCommon.cs
CodeGenContext.cs
CodeGenerator.cs Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015) 2022-01-21 12:47:34 -03:00
HardwareCapabilities.cs
IntrinsicInfo.cs
IntrinsicTable.cs
IntrinsicType.cs Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630) 2020-12-07 10:37:07 +01:00
PreAllocator.cs
X86Condition.cs
X86Instruction.cs
X86Optimizer.cs
X86Register.cs