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https://github.com/yuzu-emu/mbedtls.git
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tinycrypt: Add ARM assembler optimisations
For ARM Compiler 5 only, provide assembler versions of vli_add, vli_sub, vli_rshift1 and muladd. Signed-off-by: Kevin Bracey <kevin.bracey@arm.com>
This commit is contained in:
Kevin Bracey
parent
f40c79272f
commit
1959c18c69
210
tinycrypt/ecc.c
210
tinycrypt/ecc.c
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@ -69,6 +69,16 @@
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#include <string.h>
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#include <string.h>
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#include "mbedtls/platform_util.h"
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#include "mbedtls/platform_util.h"
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#ifdef __CC_ARM
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#pragma diag_suppress 667 // strict diagnostic: "asm" function is nonstandard
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#endif
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#if defined MBEDTLS_HAVE_ASM
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#ifndef asm
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#define asm __asm
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#endif
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#endif
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/* Parameters for curve NIST P-256 aka secp256r1 */
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/* Parameters for curve NIST P-256 aka secp256r1 */
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const uECC_word_t curve_p[NUM_ECC_WORDS] = {
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const uECC_word_t curve_p[NUM_ECC_WORDS] = {
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BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
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BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
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@ -322,6 +332,62 @@ uECC_word_t cond_set(uECC_word_t p_true, uECC_word_t p_false, unsigned int cond)
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/* Computes result = left - right, returning borrow, in constant time.
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/* Computes result = left - right, returning borrow, in constant time.
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* Can modify in place. */
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* Can modify in place. */
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#if defined MBEDTLS_HAVE_ASM && defined __CC_ARM
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__asm uECC_word_t uECC_vli_sub(uECC_word_t *result, const uECC_word_t *left,
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const uECC_word_t *right)
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{
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#if NUM_ECC_WORDS != 8
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#error adjust ARM assembly to handle NUM_ECC_WORDS != 8
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#endif
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#if defined __thumb__ && __TARGET_ARCH_THUMB < 4
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PUSH {r4-r6,lr}
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FRAME PUSH {r4-r6,lr}
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LDMIA r1!,{r3,r4}
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LDMIA r2!,{r5,r6}
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SUBS r3,r5
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SBCS r4,r6
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STMIA r0!,{r3,r4}
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LDMIA r1!,{r3,r4}
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LDMIA r2!,{r5,r6}
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SBCS r3,r5
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SBCS r4,r6
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STMIA r0!,{r3,r4}
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LDMIA r1!,{r3,r4}
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LDMIA r2!,{r5,r6}
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SBCS r3,r5
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SBCS r4,r6
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STMIA r0!,{r3,r4}
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LDMIA r1!,{r3,r4}
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LDMIA r2!,{r5,r6}
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SBCS r3,r5
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SBCS r4,r6
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STMIA r0!,{r3,r4}
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SBCS r0,r0 // r0 := r0 - r0 - borrow = -borrow
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RSBS r0,r0,#0 // r0 := borrow
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POP {r4-r6,pc}
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#else
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PUSH {r4-r8,lr}
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FRAME PUSH {r4-r8,lr}
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LDMIA r1!,{r3-r6}
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LDMIA r2!,{r7,r8,r12,lr}
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SUBS r3,r7
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SBCS r4,r8
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SBCS r5,r12
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SBCS r6,lr
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STMIA r0!,{r3-r6}
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LDMIA r1!,{r3-r6}
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LDMIA r2!,{r7,r8,r12,lr}
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SBCS r3,r7
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SBCS r4,r8
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SBCS r5,r12
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SBCS r6,lr
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STMIA r0!,{r3-r6}
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SBCS r0,r0 // r0 := r0 - r0 - borrow = -borrow
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RSBS r0,r0,#0 // r0 := borrow
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POP {r4-r8,pc}
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#endif
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}
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#else
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uECC_word_t uECC_vli_sub(uECC_word_t *result, const uECC_word_t *left,
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uECC_word_t uECC_vli_sub(uECC_word_t *result, const uECC_word_t *left,
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const uECC_word_t *right)
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const uECC_word_t *right)
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{
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{
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@ -336,9 +402,66 @@ uECC_word_t uECC_vli_sub(uECC_word_t *result, const uECC_word_t *left,
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}
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}
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return borrow;
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return borrow;
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}
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}
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#endif
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/* Computes result = left + right, returning carry, in constant time.
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/* Computes result = left + right, returning carry, in constant time.
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* Can modify in place. */
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* Can modify in place. */
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#if defined MBEDTLS_HAVE_ASM && defined __CC_ARM
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static __asm uECC_word_t uECC_vli_add(uECC_word_t *result, const uECC_word_t *left,
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const uECC_word_t *right)
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{
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#if NUM_ECC_WORDS != 8
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#error adjust ARM assembly to handle NUM_ECC_WORDS != 8
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#endif
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#if defined __thumb__ && __TARGET_ARCH_THUMB < 4
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PUSH {r4-r6,lr}
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FRAME PUSH {r4-r6,lr}
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LDMIA r1!,{r3,r4}
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LDMIA r2!,{r5,r6}
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ADDS r3,r5
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ADCS r4,r6
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STMIA r0!,{r3,r4}
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LDMIA r1!,{r3,r4}
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LDMIA r2!,{r5,r6}
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ADCS r3,r5
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ADCS r4,r6
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STMIA r0!,{r3,r4}
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LDMIA r1!,{r3,r4}
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LDMIA r2!,{r5,r6}
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ADCS r3,r5
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ADCS r4,r6
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STMIA r0!,{r3,r4}
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LDMIA r1!,{r3,r4}
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LDMIA r2!,{r5,r6}
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ADCS r3,r5
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ADCS r4,r6
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STMIA r0!,{r3,r4}
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MOVS r0,#0 // does not affect C flag
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ADCS r0,r0 // r0 := 0 + 0 + C = carry
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POP {r4-r6,pc}
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#else
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PUSH {r4-r8,lr}
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FRAME PUSH {r4-r8,lr}
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LDMIA r1!,{r3-r6}
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LDMIA r2!,{r7,r8,r12,lr}
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ADDS r3,r7
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ADCS r4,r8
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ADCS r5,r12
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ADCS r6,lr
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STMIA r0!,{r3-r6}
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LDMIA r1!,{r3-r6}
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LDMIA r2!,{r7,r8,r12,lr}
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ADCS r3,r7
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ADCS r4,r8
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ADCS r5,r12
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ADCS r6,lr
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STMIA r0!,{r3-r6}
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MOVS r0,#0 // does not affect C flag
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ADCS r0,r0 // r0 := 0 + 0 + C = carry
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POP {r4-r8,pc}
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#endif
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}
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#else
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static uECC_word_t uECC_vli_add(uECC_word_t *result, const uECC_word_t *left,
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static uECC_word_t uECC_vli_add(uECC_word_t *result, const uECC_word_t *left,
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const uECC_word_t *right)
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const uECC_word_t *right)
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{
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{
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@ -352,6 +475,7 @@ static uECC_word_t uECC_vli_add(uECC_word_t *result, const uECC_word_t *left,
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}
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}
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return carry;
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return carry;
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}
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}
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#endif
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cmpresult_t uECC_vli_cmp(const uECC_word_t *left, const uECC_word_t *right)
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cmpresult_t uECC_vli_cmp(const uECC_word_t *left, const uECC_word_t *right)
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{
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{
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@ -362,6 +486,46 @@ cmpresult_t uECC_vli_cmp(const uECC_word_t *left, const uECC_word_t *right)
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}
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}
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/* Computes vli = vli >> 1. */
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/* Computes vli = vli >> 1. */
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#if defined MBEDTLS_HAVE_ASM && defined __CC_ARM
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static __asm void uECC_vli_rshift1(uECC_word_t *vli)
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{
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#if defined __thumb__ && __TARGET_ARCH_THUMB < 4
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// RRX instruction is not available, so although we
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// can use C flag, it's not that effective. Does at
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// least save one working register, meaning we don't need stack
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MOVS r3,#0 // initial carry = 0
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MOVS r2,#__cpp(4 * (NUM_ECC_WORDS - 1))
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01 LDR r1,[r0,r2]
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LSRS r1,r1,#1 // r2 = word >> 1
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ORRS r1,r3 // merge in the previous carry
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STR r1,[r0,r2]
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ADCS r3,r3 // put C into bottom bit of r3
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LSLS r3,r3,#31 // shift it up to the top ready for next word
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SUBS r2,r2,#4
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BPL %B01
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BX lr
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#else
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#if NUM_ECC_WORDS != 8
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#error adjust ARM assembly to handle NUM_ECC_WORDS != 8
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#endif
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// Smooth multiword operation, lots of 32-bit instructions
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ADDS r0,#32
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LDMDB r0,{r1-r3,ip}
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LSRS ip,ip,#1
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RRXS r3,r3
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RRXS r2,r2
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RRXS r1,r1
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STMDB r0!,{r1-r3,ip}
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LDMDB r0,{r1-r3,ip}
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RRXS ip,ip
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RRXS r3,r3
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RRXS r2,r2
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RRX r1,r1
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STMDB r0!,{r1-r3,ip}
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BX lr
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#endif
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}
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#else
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static void uECC_vli_rshift1(uECC_word_t *vli)
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static void uECC_vli_rshift1(uECC_word_t *vli)
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{
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{
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uECC_word_t *end = vli;
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uECC_word_t *end = vli;
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@ -374,6 +538,7 @@ static void uECC_vli_rshift1(uECC_word_t *vli)
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carry = temp << (uECC_WORD_BITS - 1);
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carry = temp << (uECC_WORD_BITS - 1);
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}
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}
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}
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}
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#endif
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/* Compute a * b + r, where r is a double-word with high-order word r1 and
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/* Compute a * b + r, where r is a double-word with high-order word r1 and
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* low-order word r0, and store the result in the same double-word (r1, r0),
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* low-order word r0, and store the result in the same double-word (r1, r0),
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@ -385,6 +550,50 @@ static void uECC_vli_rshift1(uECC_word_t *vli)
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* [out] r0, r1: low and high-order words of the result
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* [out] r0, r1: low and high-order words of the result
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* [out] r2: carry
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* [out] r2: carry
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*/
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*/
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#if defined MBEDTLS_HAVE_ASM && defined __CC_ARM
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static __asm void muladd(uECC_word_t a, uECC_word_t b, uECC_word_t *r0,
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uECC_word_t *r1, uECC_word_t *r2)
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{
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#if defined __thumb__ && __TARGET_ARCH_THUMB < 4
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IMPORT __ARM_common_ll_muluu
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PRESERVE8
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// have to save r4 to keep stack 8-byte aligned, but then
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// may as well make use of it - helps a bit having it
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PUSH {r2,r3,r4,lr}
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FRAME SAVE {r4,lr},-8
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FRAME ADDRESS sp,16
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BL __ARM_common_ll_muluu
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POP {r2,r3}
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FRAME ADDRESS sp,8
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LDR r4,[r2]
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ADDS r4,r0
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STR r4,[r2]
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LDR r4,[r3]
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ADCS r4,r1
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STR r4,[r3]
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LDR r3,[sp,#8]
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LDR r4,[r3]
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MOVS r0,#0
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ADCS r4,r0
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STR r4,[r3]
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POP {r4,pc}
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#else
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UMULL r0,r1,r0,r1
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LDR ip,[r2]
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ADDS r0,r0,ip
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STR r0,[r2]
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LDR r0,[r3]
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ADCS r0,r1
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STR r0,[r3]
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LDR r3,[sp,#0]
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LDR r0,[r3]
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ADC r0,r0,#0
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STR r0,[r3]
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BX lr
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#endif
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}
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#else
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static void muladd(uECC_word_t a, uECC_word_t b, uECC_word_t *r0,
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static void muladd(uECC_word_t a, uECC_word_t b, uECC_word_t *r0,
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uECC_word_t *r1, uECC_word_t *r2)
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uECC_word_t *r1, uECC_word_t *r2)
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{
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{
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@ -397,6 +606,7 @@ static void muladd(uECC_word_t a, uECC_word_t b, uECC_word_t *r0,
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*r0 = (uECC_word_t)r01;
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*r0 = (uECC_word_t)r01;
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}
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}
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#endif
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/* State for implementing random delays in uECC_vli_mult_rnd().
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/* State for implementing random delays in uECC_vli_mult_rnd().
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*
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*
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