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unicorn/qemu/include/exec/gen-icount.h

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import
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#ifndef GEN_ICOUNT_H
Clean up decorations and whitespace around header guards Cleaned up with scripts/clean-header-guards.pl. Backports commit 175de52487ce0b0c78daa4cdf41a5a465a168a25 from qemu
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#define GEN_ICOUNT_H
import
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#include "qemu/timer.h"
/* Helpers for instruction counting code generation. */
gen-icount: Use tcg_set_insn_param Use tcg_set_insn_param() instead of directly accessing internal tcg data structures to update an insn param. Backports commit 25caa94c4a26daaab1e65c6d887e2972aeb5749e from qemu
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//static int icount_start_insn_idx
tcg: Change translator-side labels to a pointer This is improved type checking for the translators -- it's no longer possible to accidentally swap arguments to the branch functions. Note that the code generating backends still manipulate labels as int. With notable exceptions, the scope of the change is just a few lines for each target, so it's not worth building extra machinery to do this change in per-target increments. Backports commit 42a268c241183877192c376d03bd9b6d527407c7 from qemu
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//static TCGLabel *icount_label;
//static TCGLabel *exitreq_label;
import
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static inline void gen_tb_start(TCGContext *tcg_ctx)
{
tcg: Put opcodes in a linked list The previous setup required ops and args to be completely sequential, and was error prone when it came to both iteration and optimization.
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//TCGv_i32 count, flag, imm;
import
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TCGv_i32 flag;
tcg_ctx->exitreq_label = gen_new_label(tcg_ctx);
flag = tcg_temp_new_i32(tcg_ctx);
tcg_gen_ld_i32(tcg_ctx, flag, tcg_ctx->cpu_env,
offsetof(CPUState, tcg_exit_req) - ENV_OFFSET);
tcg_gen_brcondi_i32(tcg_ctx, TCG_COND_NE, flag, 0, tcg_ctx->exitreq_label);
tcg_temp_free_i32(tcg_ctx, flag);
#if 0
tcg: Put opcodes in a linked list The previous setup required ops and args to be completely sequential, and was error prone when it came to both iteration and optimization.
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if (!(s->tb->cflags & CF_USE_ICOUNT)) {
import
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return;
tcg: Put opcodes in a linked list The previous setup required ops and args to be completely sequential, and was error prone when it came to both iteration and optimization.
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}
import
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tcg: Put opcodes in a linked list The previous setup required ops and args to be completely sequential, and was error prone when it came to both iteration and optimization.
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icount_label = gen_new_label(tcg_ctx);
count = tcg_temp_local_new_i32(tcg_ctx);
tcg_gen_ld_i32(tcg_ctx, count, cpu_env,
import
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-ENV_OFFSET + offsetof(CPUState, icount_decr.u32));
tcg: Put opcodes in a linked list The previous setup required ops and args to be completely sequential, and was error prone when it came to both iteration and optimization.
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imm = tcg_temp_new_i32(tcg_ctx);
gen-icount: Use tcg_set_insn_param Use tcg_set_insn_param() instead of directly accessing internal tcg data structures to update an insn param. Backports commit 25caa94c4a26daaab1e65c6d887e2972aeb5749e from qemu
2018-02-24 01:01:15 +00:00
/* We emit a movi with a dummy immediate argument. Keep the insn index
* of the movi so that we later (when we know the actual insn count)
* can update the immediate argument with the actual insn count. */
icount_start_insn_idx = tcg_op_buf_count(tcg_ctx);
tcg: Put opcodes in a linked list The previous setup required ops and args to be completely sequential, and was error prone when it came to both iteration and optimization.
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tcg_gen_movi_i32(tcg_ctx, imm, 0xdeadbeef);
tcg_gen_sub_i32(tcg_ctx, count, count, imm);
tcg_temp_free_i32(tcg_ctx, imm);
tcg_gen_brcondi_i32(tcg_ctx, TCG_COND_LT, count, 0, icount_label);
tcg_gen_st16_i32(tcg_ctx, count, cpu_env,
import
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-ENV_OFFSET + offsetof(CPUState, icount_decr.u16.low));
tcg: Put opcodes in a linked list The previous setup required ops and args to be completely sequential, and was error prone when it came to both iteration and optimization.
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tcg_temp_free_i32(tcg_ctx, count);
import
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#endif
}
static inline void gen_tb_end(TCGContext *tcg_ctx, TranslationBlock *tb, int num_insns)
{
gen_set_label(tcg_ctx, tcg_ctx->exitreq_label);
tcg_gen_exit_tb(tcg_ctx, (uintptr_t)tb + TB_EXIT_REQUESTED);
#if 0
if (use_icount) {
gen-icount: Use tcg_set_insn_param Use tcg_set_insn_param() instead of directly accessing internal tcg data structures to update an insn param. Backports commit 25caa94c4a26daaab1e65c6d887e2972aeb5749e from qemu
2018-02-24 01:01:15 +00:00
/* Update the num_insn immediate parameter now that we know
* the actual insn count. */
tcg_set_insn_param(tcg_ctx, icount_start_insn_idx, 1, num_insns);
import
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gen_set_label(icount_label);
tcg_gen_exit_tb((uintptr_t)tb + TB_EXIT_ICOUNT_EXPIRED);
}
#endif
tcg: Move emit of INDEX_op_end into gen_tb_end Backports commit 0a7df5da986bd7ee0789f2d7b8611f2e8eee5046 from qemu
2018-02-09 13:50:47 +00:00
tcg: Put opcodes in a linked list The previous setup required ops and args to be completely sequential, and was error prone when it came to both iteration and optimization.
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/* Terminate the linked list. */
tcg: Reorg TCGOp chaining Instead of using -1 as end of chain, use 0, and link through the 0 entry as a fully circular double-linked list. Backports commit dcb8e75870e2de199db853697f8839cb603beefe from qemu
2018-02-26 02:36:41 +00:00
tcg_ctx->gen_op_buf[tcg_ctx->gen_op_buf[0].prev].next = 0;
import
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}
#if 0
static inline void gen_io_start(void)
{
TCGv_i32 tmp = tcg_const_i32(1);
tcg_gen_st_i32(tmp, cpu_env, -ENV_OFFSET + offsetof(CPUState, can_do_io));
tcg_temp_free_i32(tmp);
}
static inline void gen_io_end(void)
{
TCGv_i32 tmp = tcg_const_i32(0);
tcg_gen_st_i32(tmp, cpu_env, -ENV_OFFSET + offsetof(CPUState, can_do_io));
tcg_temp_free_i32(tmp);
}
#endif
#endif
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