yuzu/unicorn - Forgejo

yuzu/unicorn

mirror of https://github.com/yuzu-emu/unicorn.git synced 2025-02-01 22:01:10 +00:00

2 lines

44 B

Makefile

Raw Normal View History

target/riscv: Initial introduction of the RISC-V target This ports over the RISC-V architecture from Qemu. This is currently a very barebones transition. No code hooking or any fancy stuff. Currently, you can feed it instructions and query the CPU state itself. This also allows choosing whether or not RISC-V 32-bit or RISC-V 64-bit is desirable through Unicorn's interface as well. Extremely basic examples of executing a single instruction have been added to the samples directory to help demonstrate how to use the basic functionality.

2019-03-08 18:06:28 +00:00

# Default configuration for riscv32-softmmu