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target/arm: Convert get_phys_addr_lpae() to not return FSC values
Make get_phys_addr_v6() return a fault type in the ARMMMUFaultInfo structure, which we convert to the FSC at the callsite. Backports commit da909b2c23a68e57bbcb6be98229e40df606f0c8 from qemu
This commit is contained in:
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c6496ec00a
commit
013e7873ee
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@ -26,7 +26,7 @@ static bool get_phys_addr(CPUARMState *env, target_ulong address,
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static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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MMUAccessType access_type, ARMMMUIdx mmu_idx,
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hwaddr *phys_ptr, MemTxAttrs *txattrs, int *prot,
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target_ulong *page_size_ptr, uint32_t *fsr,
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target_ulong *page_size_ptr,
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ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs);
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/* Security attributes for an address, as returned by v8m_security_lookup. */
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@ -7465,10 +7465,9 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx,
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hwaddr s2pa;
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int s2prot;
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int ret;
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uint32_t fsr;
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ret = get_phys_addr_lpae(env, addr, 0, ARMMMUIdx_S2NS, &s2pa,
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&txattrs, &s2prot, &s2size, &fsr, fi, NULL);
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&txattrs, &s2prot, &s2size, fi, NULL);
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if (ret) {
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fi->s2addr = addr;
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fi->stage2 = true;
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@ -7791,15 +7790,6 @@ do_fault:
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return true;
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}
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/* Fault type for long-descriptor MMU fault reporting; this corresponds
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* to bits [5..2] in the STATUS field in long-format DFSR/IFSR.
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*/
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typedef enum {
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translation_fault = 1,
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access_fault = 2,
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permission_fault = 3,
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} MMUFaultType;
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/*
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* check_s2_mmu_setup
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* @cpu: ARMCPU
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@ -7901,13 +7891,13 @@ static uint8_t convert_stage2_attrs(CPUARMState *env, uint8_t s2attrs)
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static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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MMUAccessType access_type, ARMMMUIdx mmu_idx,
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hwaddr *phys_ptr, MemTxAttrs *txattrs, int *prot,
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target_ulong *page_size_ptr, uint32_t *fsr,
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target_ulong *page_size_ptr,
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ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs)
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{
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ARMCPU *cpu = arm_env_get_cpu(env);
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CPUState *cs = CPU(cpu);
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/* Read an LPAE long-descriptor translation table. */
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MMUFaultType fault_type = translation_fault;
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ARMFaultType fault_type = ARMFault_Translation;
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uint32_t level;
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uint32_t epd = 0;
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int32_t t0sz, t1sz;
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@ -8017,7 +8007,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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ttbr_select = 1;
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} else {
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/* in the gap between the two regions, this is a Translation fault */
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fault_type = translation_fault;
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fault_type = ARMFault_Translation;
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goto do_fault;
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}
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@ -8103,7 +8093,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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ok = check_s2_mmu_setup(cpu, aarch64, startlevel,
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inputsize, stride);
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if (!ok) {
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fault_type = translation_fault;
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fault_type = ARMFault_Translation;
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goto do_fault;
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}
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level = startlevel;
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@ -8188,7 +8178,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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/* Here descaddr is the final physical address, and attributes
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* are all in attrs.
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*/
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fault_type = access_fault;
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fault_type = ARMFault_AccessFlag;
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if ((attrs & (1 << 8)) == 0) {
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/* Access flag */
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goto do_fault;
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@ -8206,7 +8196,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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*prot = get_S1prot(env, mmu_idx, aarch64, ap, ns, xn, pxn);
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}
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fault_type = permission_fault;
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fault_type = ARMFault_Permission;
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if (!(*prot & (1 << access_type))) {
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/* Unprivileged access not enabled */
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goto do_fault;
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@ -8239,10 +8229,8 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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return false;
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do_fault:
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/* Long-descriptor format IFSR/DFSR value */
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*fsr = (1 << 9) | (fault_type << 2) | level;
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/* Tag the error as S2 for failed S1 PTW at S2 or ordinary S2. */
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fi->stage2 = fi->s1ptw || (mmu_idx == ARMMMUIdx_S2NS);
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fi->type = fault_type;
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fi->level = level;
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return true;
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}
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@ -8961,8 +8949,9 @@ static bool get_phys_addr(CPUARMState *env, target_ulong address,
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/* S1 is done. Now do S2 translation. */
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ret = get_phys_addr_lpae(env, ipa, access_type, ARMMMUIdx_S2NS,
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phys_ptr, attrs, &s2_prot,
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page_size, fsr, fi,
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page_size, fi,
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cacheattrs != NULL ? &cacheattrs2 : NULL);
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*fsr = arm_fi_to_lfsc(fi);
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fi->s2addr = ipa;
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/* Combine the S1 and S2 perms. */
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*prot &= s2_prot;
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@ -9040,8 +9029,12 @@ static bool get_phys_addr(CPUARMState *env, target_ulong address,
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}
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if (regime_using_lpae_format(env, mmu_idx)) {
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return get_phys_addr_lpae(env, address, access_type, mmu_idx, phys_ptr,
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attrs, prot, page_size, fsr, fi, cacheattrs);
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bool ret = get_phys_addr_lpae(env, address, access_type, mmu_idx,
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phys_ptr, attrs, prot, page_size,
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fi, cacheattrs);
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*fsr = arm_fi_to_lfsc(fi);
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return ret;
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} else if (regime_sctlr(env, mmu_idx) & SCTLR_XP) {
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bool ret = get_phys_addr_v6(env, address, access_type, mmu_idx,
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phys_ptr, attrs, prot, page_size, fi);
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