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Add support for ARM application flags - APSR register (#776)
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@ -41,7 +41,8 @@ def test_arm():
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mu.reg_write(UC_ARM_REG_R0, 0x1234)
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mu.reg_write(UC_ARM_REG_R2, 0x6789)
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mu.reg_write(UC_ARM_REG_R3, 0x3333)
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mu.reg_write(UC_ARM_REG_APSR, 0xFFFFFFFF) #All application flags turned on
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# tracing all basic blocks with customized callback
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mu.hook_add(UC_HOOK_BLOCK, hook_block)
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@ -62,6 +62,9 @@ int arm_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
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*(float64 *)value = ARM_CPU(uc, mycpu)->env.vfp.regs[regid - UC_ARM_REG_D0];
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else {
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switch(regid) {
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case UC_ARM_REG_APSR:
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*(int32_t *)value = cpsr_read(&ARM_CPU(uc, mycpu)->env) & CPSR_NZCV;
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break;
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case UC_ARM_REG_CPSR:
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*(int32_t *)value = cpsr_read(&ARM_CPU(uc, mycpu)->env);
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break;
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@ -107,6 +110,9 @@ int arm_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals, i
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ARM_CPU(uc, mycpu)->env.vfp.regs[regid - UC_ARM_REG_D0] = *(float64 *)value;
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else {
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switch(regid) {
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case UC_ARM_REG_APSR:
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cpsr_write(&ARM_CPU(uc, mycpu)->env, *(uint32_t *)value, CPSR_NZCV);
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break;
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case UC_ARM_REG_CPSR:
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cpsr_write(&ARM_CPU(uc, mycpu)->env, *(uint32_t *)value, ~0);
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break;
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