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target-mips: make cpu-qom.h not target specific

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Make MIPSCPU an opaque type within cpu-qom.h, and move all definitions of
private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.

Backports commit 416bf936864f16caad6993b9ebd452fb34f801bd from qemu
This commit is contained in:
Paolo Bonzini 2018-02-24 00:58:59 -05:00 committed by Lioncash
parent 27ebc27beb
commit 01bd1c1a73
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 30 additions and 31 deletions
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31
qemu/target-mips/cpu-qom.h
View file

@ -50,35 +50,6 @@ typedef struct MIPSCPUClass {
void (*parent_reset)(CPUState *cpu); void (*parent_reset)(CPUState *cpu);
} MIPSCPUClass; } MIPSCPUClass;
/** typedef struct MIPSCPU MIPSCPU;
* MIPSCPU:
* @env: #CPUMIPSState
*
* A MIPS CPU.
*/
typedef struct MIPSCPU {
/*< private >*/
CPUState parent_obj;
/*< public >*/
CPUMIPSState env;
} MIPSCPU;
static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env)
{
return container_of(env, MIPSCPU, env);
}
#define ENV_GET_CPU(e) CPU(mips_env_get_cpu(e))
#define ENV_OFFSET offsetof(MIPSCPU, env)
void mips_cpu_do_interrupt(CPUState *cpu);
bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int mips_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
int is_write, int is_user, uintptr_t retaddr);
#endif #endif

30
qemu/target-mips/cpu.h
View file

@ -9,6 +9,7 @@
#include "config.h" #include "config.h"
#include "qemu-common.h" #include "qemu-common.h"
#include "cpu-qom.h"
#include "mips-defs.h" #include "mips-defs.h"
#include "exec/cpu-defs.h" #include "exec/cpu-defs.h"
#include "fpu/softfloat.h" #include "fpu/softfloat.h"
@ -613,7 +614,34 @@ struct CPUMIPSState {
struct uc_struct *uc; struct uc_struct *uc;
}; };
#include "cpu-qom.h" /**
* MIPSCPU:
* @env: #CPUMIPSState
*
* A MIPS CPU.
*/
typedef struct MIPSCPU {
/*< private >*/
CPUState parent_obj;
/*< public >*/
CPUMIPSState env;
} MIPSCPU;
static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env)
{
return container_of(env, MIPSCPU, env);
}
#define ENV_GET_CPU(e) CPU(mips_env_get_cpu(e))
#define ENV_OFFSET offsetof(MIPSCPU, env)
void mips_cpu_do_interrupt(CPUState *cpu);
bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
int is_write, int is_user, uintptr_t retaddr);
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
int no_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot, int no_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,